Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits
In this article, unlike almost all state-of-the-art obfuscation solutions that focus on functional/logic obfuscation, we introduce a new paradigm, called data flow obfuscation, which exploits the essence of asynchronicity. In data flow obfuscation, by benefiting from the handshaking mechanism of asy...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2021-04, Vol.29 (4), p.643-656 |
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creator | Zamiri Azar, Kimia Kamali, Hadi Mardani Roshanisefat, Shervin Homayoun, Houman Sotiriou, Christos P. Sasan, Avesta |
description | In this article, unlike almost all state-of-the-art obfuscation solutions that focus on functional/logic obfuscation, we introduce a new paradigm, called data flow obfuscation, which exploits the essence of asynchronicity. In data flow obfuscation, by benefiting from the handshaking mechanism of asynchronous circuits, the system's FFs/latches will operate out of sync. Hence, the adversary has no sufficient knowledge to apply unrolling/BMC. Also, due to the inherited asynchronicity, the exact time of writing/capturing data into/from the scan chain becomes hidden. Hence, the SAT attack cannot be applied even while scan chain access is open. Moreover, our new proposed paradigm creates stateful/oscillating combinational cycles into the design which extensively boosts the difficulty of modeling this technique. We also demonstrate how data flow obfuscation could easily be integrated with any circuit at low overhead while there is no limitation such as compromising test flow. |
doi_str_mv | 10.1109/TVLSI.2021.3060345 |
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fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_2509075339</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9369866</ieee_id><sourcerecordid>2509075339</sourcerecordid><originalsourceid>FETCH-LOGICAL-c405t-a9fb681061588480c1e6c629c71c9a47120c73a2b842b61847458a2f8261d2f83</originalsourceid><addsrcrecordid>eNpFkE9LAzEQxYMoWKtfQC8Bz7tO_m7iQSjVaqFYweo1ZNNs2dJ2a7JL8dub2qJzeQPz3szwQ-iaQE4I6LvZ5-R9nFOgJGcggXFxgnpEiCLTqU5TD5JlihI4RxcxLgEI5xp66OHRthaPVs0OT8uqi862dbO5xwP86nf4zQY7rxdrXDXhf75Z4GEdXFe38RKdVXYV_dVR--hj9DQbvmST6fN4OJhkjoNoM6urUqr0AxFKcQWOeOkk1a4gTlteEAquYJaWitNSEsULLpSllaKSzJOwPro97N2G5qvzsTXLpgubdNJQARoKwZhOLnpwudDEGHxltqFe2_BtCJg9J_PLyew5mSOnFLo5hGrv_V9AM6mVlOwHuSphUw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2509075339</pqid></control><display><type>article</type><title>Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits</title><source>IEEE Electronic Library (IEL)</source><creator>Zamiri Azar, Kimia ; Kamali, Hadi Mardani ; Roshanisefat, Shervin ; Homayoun, Houman ; Sotiriou, Christos P. ; Sasan, Avesta</creator><creatorcontrib>Zamiri Azar, Kimia ; Kamali, Hadi Mardani ; Roshanisefat, Shervin ; Homayoun, Houman ; Sotiriou, Christos P. ; Sasan, Avesta</creatorcontrib><description>In this article, unlike almost all state-of-the-art obfuscation solutions that focus on functional/logic obfuscation, we introduce a new paradigm, called data flow obfuscation, which exploits the essence of asynchronicity. In data flow obfuscation, by benefiting from the handshaking mechanism of asynchronous circuits, the system's FFs/latches will operate out of sync. Hence, the adversary has no sufficient knowledge to apply unrolling/BMC. Also, due to the inherited asynchronicity, the exact time of writing/capturing data into/from the scan chain becomes hidden. Hence, the SAT attack cannot be applied even while scan chain access is open. Moreover, our new proposed paradigm creates stateful/oscillating combinational cycles into the design which extensively boosts the difficulty of modeling this technique. We also demonstrate how data flow obfuscation could easily be integrated with any circuit at low overhead while there is no limitation such as compromising test flow.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2021.3060345</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Chains ; Circuits ; Clocks ; Delays ; Desynchronization ; Integrated circuit modeling ; Latches ; logic obfuscation ; Model checking ; Sequential circuits</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 2021-04, Vol.29 (4), p.643-656</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c405t-a9fb681061588480c1e6c629c71c9a47120c73a2b842b61847458a2f8261d2f83</citedby><cites>FETCH-LOGICAL-c405t-a9fb681061588480c1e6c629c71c9a47120c73a2b842b61847458a2f8261d2f83</cites><orcidid>0000-0002-4246-6736 ; 0000-0002-4052-8075 ; 0000-0001-8904-4699 ; 0000-0001-9318-474X ; 0000-0003-3407-449X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9369866$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54736</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9369866$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Zamiri Azar, Kimia</creatorcontrib><creatorcontrib>Kamali, Hadi Mardani</creatorcontrib><creatorcontrib>Roshanisefat, Shervin</creatorcontrib><creatorcontrib>Homayoun, Houman</creatorcontrib><creatorcontrib>Sotiriou, Christos P.</creatorcontrib><creatorcontrib>Sasan, Avesta</creatorcontrib><title>Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>In this article, unlike almost all state-of-the-art obfuscation solutions that focus on functional/logic obfuscation, we introduce a new paradigm, called data flow obfuscation, which exploits the essence of asynchronicity. In data flow obfuscation, by benefiting from the handshaking mechanism of asynchronous circuits, the system's FFs/latches will operate out of sync. Hence, the adversary has no sufficient knowledge to apply unrolling/BMC. Also, due to the inherited asynchronicity, the exact time of writing/capturing data into/from the scan chain becomes hidden. Hence, the SAT attack cannot be applied even while scan chain access is open. Moreover, our new proposed paradigm creates stateful/oscillating combinational cycles into the design which extensively boosts the difficulty of modeling this technique. We also demonstrate how data flow obfuscation could easily be integrated with any circuit at low overhead while there is no limitation such as compromising test flow.</description><subject>Chains</subject><subject>Circuits</subject><subject>Clocks</subject><subject>Delays</subject><subject>Desynchronization</subject><subject>Integrated circuit modeling</subject><subject>Latches</subject><subject>logic obfuscation</subject><subject>Model checking</subject><subject>Sequential circuits</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpFkE9LAzEQxYMoWKtfQC8Bz7tO_m7iQSjVaqFYweo1ZNNs2dJ2a7JL8dub2qJzeQPz3szwQ-iaQE4I6LvZ5-R9nFOgJGcggXFxgnpEiCLTqU5TD5JlihI4RxcxLgEI5xp66OHRthaPVs0OT8uqi862dbO5xwP86nf4zQY7rxdrXDXhf75Z4GEdXFe38RKdVXYV_dVR--hj9DQbvmST6fN4OJhkjoNoM6urUqr0AxFKcQWOeOkk1a4gTlteEAquYJaWitNSEsULLpSllaKSzJOwPro97N2G5qvzsTXLpgubdNJQARoKwZhOLnpwudDEGHxltqFe2_BtCJg9J_PLyew5mSOnFLo5hGrv_V9AM6mVlOwHuSphUw</recordid><startdate>20210401</startdate><enddate>20210401</enddate><creator>Zamiri Azar, Kimia</creator><creator>Kamali, Hadi Mardani</creator><creator>Roshanisefat, Shervin</creator><creator>Homayoun, Houman</creator><creator>Sotiriou, Christos P.</creator><creator>Sasan, Avesta</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-4246-6736</orcidid><orcidid>https://orcid.org/0000-0002-4052-8075</orcidid><orcidid>https://orcid.org/0000-0001-8904-4699</orcidid><orcidid>https://orcid.org/0000-0001-9318-474X</orcidid><orcidid>https://orcid.org/0000-0003-3407-449X</orcidid></search><sort><creationdate>20210401</creationdate><title>Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits</title><author>Zamiri Azar, Kimia ; Kamali, Hadi Mardani ; Roshanisefat, Shervin ; Homayoun, Houman ; Sotiriou, Christos P. ; Sasan, Avesta</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c405t-a9fb681061588480c1e6c629c71c9a47120c73a2b842b61847458a2f8261d2f83</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Chains</topic><topic>Circuits</topic><topic>Clocks</topic><topic>Delays</topic><topic>Desynchronization</topic><topic>Integrated circuit modeling</topic><topic>Latches</topic><topic>logic obfuscation</topic><topic>Model checking</topic><topic>Sequential circuits</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Zamiri Azar, Kimia</creatorcontrib><creatorcontrib>Kamali, Hadi Mardani</creatorcontrib><creatorcontrib>Roshanisefat, Shervin</creatorcontrib><creatorcontrib>Homayoun, Houman</creatorcontrib><creatorcontrib>Sotiriou, Christos P.</creatorcontrib><creatorcontrib>Sasan, Avesta</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zamiri Azar, Kimia</au><au>Kamali, Hadi Mardani</au><au>Roshanisefat, Shervin</au><au>Homayoun, Houman</au><au>Sotiriou, Christos P.</au><au>Sasan, Avesta</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2021-04-01</date><risdate>2021</risdate><volume>29</volume><issue>4</issue><spage>643</spage><epage>656</epage><pages>643-656</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>In this article, unlike almost all state-of-the-art obfuscation solutions that focus on functional/logic obfuscation, we introduce a new paradigm, called data flow obfuscation, which exploits the essence of asynchronicity. In data flow obfuscation, by benefiting from the handshaking mechanism of asynchronous circuits, the system's FFs/latches will operate out of sync. Hence, the adversary has no sufficient knowledge to apply unrolling/BMC. Also, due to the inherited asynchronicity, the exact time of writing/capturing data into/from the scan chain becomes hidden. Hence, the SAT attack cannot be applied even while scan chain access is open. Moreover, our new proposed paradigm creates stateful/oscillating combinational cycles into the design which extensively boosts the difficulty of modeling this technique. We also demonstrate how data flow obfuscation could easily be integrated with any circuit at low overhead while there is no limitation such as compromising test flow.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TVLSI.2021.3060345</doi><tpages>14</tpages><orcidid>https://orcid.org/0000-0002-4246-6736</orcidid><orcidid>https://orcid.org/0000-0002-4052-8075</orcidid><orcidid>https://orcid.org/0000-0001-8904-4699</orcidid><orcidid>https://orcid.org/0000-0001-9318-474X</orcidid><orcidid>https://orcid.org/0000-0003-3407-449X</orcidid><oa>free_for_read</oa></addata></record> |
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subjects | Chains Circuits Clocks Delays Desynchronization Integrated circuit modeling Latches logic obfuscation Model checking Sequential circuits |
title | Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits |
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