A 24.4 ppm/°C Voltage Mode Bandgap Reference With a 1.05V Supply

This brief proposes a sub-1V, voltage mode CMOS bandgap reference circuit. Conventionally, sub-1V references are obtained by converting PTAT and CTAT voltages to currents and summing them in the current domain. Such techniques have multiple operating points and cannot natively support applications t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2021-04, Vol.68 (4), p.1088-1092
Hauptverfasser: Nagulapalli, R., Palani, Rakesh Kumar, Bhagavatula, Srikar
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This brief proposes a sub-1V, voltage mode CMOS bandgap reference circuit. Conventionally, sub-1V references are obtained by converting PTAT and CTAT voltages to currents and summing them in the current domain. Such techniques have multiple operating points and cannot natively support applications that require PTAT currents in addition to a bandgap voltage. This brief presents a voltage mode reference circuit, which adds a PTAT voltage with a scaled version of a CTAT voltage all within the sub-1V domain. Compared to current mode bandgaps, summing in voltage domain enables reduction of one CTAT current mirror stage and a significant reduction in PTAT current mirror ratio resulting in a reduced number of error sources. In addition, this circuit also natively supports applications that require PTAT current. A novel, high-accuracy self-biasing technique has been adopted to minimize the systematic offset induced temperature coefficient. A prototype designed in 45nm TSMC CMOS technology for a nominal voltage of 500mV demonstrates 24.4ppm/°C temperature coefficient from −40°C to 125°C, 0.15% line regulation, and draws 7.2\mu \text{A} from a 1.05V supply.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2020.3034256