Modeling Peak Temperature in SOI-FinFET-Like Structures Considering 2-D Heat Flow
An analytical thermal model to predict the peak temperature in silicon-on-insulator (SOI)-FinFET-like structures is proposed. The device is divided into two regions based on two separate heat flow paths and each region is analyzed and modeled independently to estimate the corresponding peak temperat...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on electron devices 2021-03, Vol.68 (3), p.981-986 |
|---|---|
| Hauptverfasser: | , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 986 |
|---|---|
| container_issue | 3 |
| container_start_page | 981 |
| container_title | IEEE transactions on electron devices |
| container_volume | 68 |
| creator | Nidhin, K. Nair, Deleep R. Chakravorty, Anjan |
| description | An analytical thermal model to predict the peak temperature in silicon-on-insulator (SOI)-FinFET-like structures is proposed. The device is divided into two regions based on two separate heat flow paths and each region is analyzed and modeled independently to estimate the corresponding peak temperature. Later both the models are combined to obtain the peak temperature for the device. The temperature dependence of thermal conductivity of the semiconductor material is considered in the model. Modeling results show a high level of correlation with the 3-D COMSOL and electrothermal TCAD simulation for practical range of device dimensions and power densities. Finally, the model is validated with experimental data. |
| doi_str_mv | 10.1109/TED.2021.3053224 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_2493595217</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9347713</ieee_id><sourcerecordid>2493595217</sourcerecordid><originalsourceid>FETCH-LOGICAL-c291t-5184b88a9ec135557a20310468bda7e879508b7477935f3e2337fc8997100eae3</originalsourceid><addsrcrecordid>eNo9kMtLAzEQh4MoWKt3wUvAc2qem-QofdhCpUrrOaTbWdk-dmuyS_G_N0uLp2GY3zczfAg9MjpgjNqX1Xg04JSzgaBKcC6vUI8ppYnNZHaNepQyQ6ww4hbdxbhNbSYl76HP93oD-7L6xh_gd3gFhyME37QBcFnh5WJGJmU1Ga_IvNwBXjahzbthxMO6iuUGQodyMsJT8A2e7OvTPbop_D7Cw6X20Vfih1MyX7zNhq9zknPLGqKYkWtjvIWcCZU-9ZwKRmVm1huvwWirqFlrqbUVqhDAhdBFbqzVjFLwIPro-bz3GOqfFmLjtnUbqnTScZkYqzjTKUXPqTzUMQYo3DGUBx9-HaOuE-eSONeJcxdxCXk6IyUA_MetSK8wIf4AKklmFg</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2493595217</pqid></control><display><type>article</type><title>Modeling Peak Temperature in SOI-FinFET-Like Structures Considering 2-D Heat Flow</title><source>IEEE Electronic Library (IEL)</source><creator>Nidhin, K. ; Nair, Deleep R. ; Chakravorty, Anjan</creator><creatorcontrib>Nidhin, K. ; Nair, Deleep R. ; Chakravorty, Anjan</creatorcontrib><description>An analytical thermal model to predict the peak temperature in silicon-on-insulator (SOI)-FinFET-like structures is proposed. The device is divided into two regions based on two separate heat flow paths and each region is analyzed and modeled independently to estimate the corresponding peak temperature. Later both the models are combined to obtain the peak temperature for the device. The temperature dependence of thermal conductivity of the semiconductor material is considered in the model. Modeling results show a high level of correlation with the 3-D COMSOL and electrothermal TCAD simulation for practical range of device dimensions and power densities. Finally, the model is validated with experimental data.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2021.3053224</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>2-D heat flow ; analytical model ; electrothermal heating ; FinFETs ; Flow paths ; Heat sinks ; Heat transfer ; Heat transmission ; Heat treating ; Junctions ; Logic gates ; Modelling ; Resistance heating ; Semiconductor materials ; Semiconductor process modeling ; silicon-on-insulator (SOI) FinFET ; SOI (semiconductors) ; Temperature ; Temperature dependence ; Thermal analysis ; Thermal conductivity ; Two dimensional analysis ; Two dimensional flow ; Two dimensional models</subject><ispartof>IEEE transactions on electron devices, 2021-03, Vol.68 (3), p.981-986</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-5184b88a9ec135557a20310468bda7e879508b7477935f3e2337fc8997100eae3</citedby><cites>FETCH-LOGICAL-c291t-5184b88a9ec135557a20310468bda7e879508b7477935f3e2337fc8997100eae3</cites><orcidid>0000-0002-8563-9430 ; 0000-0002-0467-8164 ; 0000-0002-5253-8975</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9347713$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27923,27924,54757</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9347713$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Nidhin, K.</creatorcontrib><creatorcontrib>Nair, Deleep R.</creatorcontrib><creatorcontrib>Chakravorty, Anjan</creatorcontrib><title>Modeling Peak Temperature in SOI-FinFET-Like Structures Considering 2-D Heat Flow</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>An analytical thermal model to predict the peak temperature in silicon-on-insulator (SOI)-FinFET-like structures is proposed. The device is divided into two regions based on two separate heat flow paths and each region is analyzed and modeled independently to estimate the corresponding peak temperature. Later both the models are combined to obtain the peak temperature for the device. The temperature dependence of thermal conductivity of the semiconductor material is considered in the model. Modeling results show a high level of correlation with the 3-D COMSOL and electrothermal TCAD simulation for practical range of device dimensions and power densities. Finally, the model is validated with experimental data.</description><subject>2-D heat flow</subject><subject>analytical model</subject><subject>electrothermal heating</subject><subject>FinFETs</subject><subject>Flow paths</subject><subject>Heat sinks</subject><subject>Heat transfer</subject><subject>Heat transmission</subject><subject>Heat treating</subject><subject>Junctions</subject><subject>Logic gates</subject><subject>Modelling</subject><subject>Resistance heating</subject><subject>Semiconductor materials</subject><subject>Semiconductor process modeling</subject><subject>silicon-on-insulator (SOI) FinFET</subject><subject>SOI (semiconductors)</subject><subject>Temperature</subject><subject>Temperature dependence</subject><subject>Thermal analysis</subject><subject>Thermal conductivity</subject><subject>Two dimensional analysis</subject><subject>Two dimensional flow</subject><subject>Two dimensional models</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kMtLAzEQh4MoWKt3wUvAc2qem-QofdhCpUrrOaTbWdk-dmuyS_G_N0uLp2GY3zczfAg9MjpgjNqX1Xg04JSzgaBKcC6vUI8ppYnNZHaNepQyQ6ww4hbdxbhNbSYl76HP93oD-7L6xh_gd3gFhyME37QBcFnh5WJGJmU1Ga_IvNwBXjahzbthxMO6iuUGQodyMsJT8A2e7OvTPbop_D7Cw6X20Vfih1MyX7zNhq9zknPLGqKYkWtjvIWcCZU-9ZwKRmVm1huvwWirqFlrqbUVqhDAhdBFbqzVjFLwIPro-bz3GOqfFmLjtnUbqnTScZkYqzjTKUXPqTzUMQYo3DGUBx9-HaOuE-eSONeJcxdxCXk6IyUA_MetSK8wIf4AKklmFg</recordid><startdate>20210301</startdate><enddate>20210301</enddate><creator>Nidhin, K.</creator><creator>Nair, Deleep R.</creator><creator>Chakravorty, Anjan</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-8563-9430</orcidid><orcidid>https://orcid.org/0000-0002-0467-8164</orcidid><orcidid>https://orcid.org/0000-0002-5253-8975</orcidid></search><sort><creationdate>20210301</creationdate><title>Modeling Peak Temperature in SOI-FinFET-Like Structures Considering 2-D Heat Flow</title><author>Nidhin, K. ; Nair, Deleep R. ; Chakravorty, Anjan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-5184b88a9ec135557a20310468bda7e879508b7477935f3e2337fc8997100eae3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>2-D heat flow</topic><topic>analytical model</topic><topic>electrothermal heating</topic><topic>FinFETs</topic><topic>Flow paths</topic><topic>Heat sinks</topic><topic>Heat transfer</topic><topic>Heat transmission</topic><topic>Heat treating</topic><topic>Junctions</topic><topic>Logic gates</topic><topic>Modelling</topic><topic>Resistance heating</topic><topic>Semiconductor materials</topic><topic>Semiconductor process modeling</topic><topic>silicon-on-insulator (SOI) FinFET</topic><topic>SOI (semiconductors)</topic><topic>Temperature</topic><topic>Temperature dependence</topic><topic>Thermal analysis</topic><topic>Thermal conductivity</topic><topic>Two dimensional analysis</topic><topic>Two dimensional flow</topic><topic>Two dimensional models</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Nidhin, K.</creatorcontrib><creatorcontrib>Nair, Deleep R.</creatorcontrib><creatorcontrib>Chakravorty, Anjan</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nidhin, K.</au><au>Nair, Deleep R.</au><au>Chakravorty, Anjan</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Modeling Peak Temperature in SOI-FinFET-Like Structures Considering 2-D Heat Flow</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2021-03-01</date><risdate>2021</risdate><volume>68</volume><issue>3</issue><spage>981</spage><epage>986</epage><pages>981-986</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>An analytical thermal model to predict the peak temperature in silicon-on-insulator (SOI)-FinFET-like structures is proposed. The device is divided into two regions based on two separate heat flow paths and each region is analyzed and modeled independently to estimate the corresponding peak temperature. Later both the models are combined to obtain the peak temperature for the device. The temperature dependence of thermal conductivity of the semiconductor material is considered in the model. Modeling results show a high level of correlation with the 3-D COMSOL and electrothermal TCAD simulation for practical range of device dimensions and power densities. Finally, the model is validated with experimental data.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2021.3053224</doi><tpages>6</tpages><orcidid>https://orcid.org/0000-0002-8563-9430</orcidid><orcidid>https://orcid.org/0000-0002-0467-8164</orcidid><orcidid>https://orcid.org/0000-0002-5253-8975</orcidid></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 2021-03, Vol.68 (3), p.981-986 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_proquest_journals_2493595217 |
| source | IEEE Electronic Library (IEL) |
| subjects | 2-D heat flow analytical model electrothermal heating FinFETs Flow paths Heat sinks Heat transfer Heat transmission Heat treating Junctions Logic gates Modelling Resistance heating Semiconductor materials Semiconductor process modeling silicon-on-insulator (SOI) FinFET SOI (semiconductors) Temperature Temperature dependence Thermal analysis Thermal conductivity Two dimensional analysis Two dimensional flow Two dimensional models |
| title | Modeling Peak Temperature in SOI-FinFET-Like Structures Considering 2-D Heat Flow |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T20%3A30%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Modeling%20Peak%20Temperature%20in%20SOI-FinFET-Like%20Structures%20Considering%202-D%20Heat%20Flow&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Nidhin,%20K.&rft.date=2021-03-01&rft.volume=68&rft.issue=3&rft.spage=981&rft.epage=986&rft.pages=981-986&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/TED.2021.3053224&rft_dat=%3Cproquest_RIE%3E2493595217%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2493595217&rft_id=info:pmid/&rft_ieee_id=9347713&rfr_iscdi=true |