An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW)
Bunch of wires (BoW) is a new open die-to-die (D2D) interface that aims to gracefully tradeoff performance for design and packaging complexity across a wide range of process nodes. BoW performance can range from 320 Gb/s/mm with a simple design and packaging to 1+ Tb/s/mm with complex design and/or...
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| Veröffentlicht in: | IEEE MICRO 2021-01, Vol.41 (1), p.54-60 |
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| creator | Ardalan, Shahab Farjadrad, Ramin Kuemerle, Mark Poulton, Ken Subramaniam, Suresh Vinnakota, Bapiraju |
| description | Bunch of wires (BoW) is a new open die-to-die (D2D) interface that aims to gracefully tradeoff performance for design and packaging complexity across a wide range of process nodes. BoW performance can range from 320 Gb/s/mm with a simple design and packaging to 1+ Tb/s/mm with complex design and/or packaging. BoW directly enables heterogeneous integration, a primary advantage of chiplets. We discuss progress on BoW based on extensive design and performance studies by engineers from multiple companies. These studies aim to make BoW easy to use in a system. This open innovation project will deliver a low-complexity D2D interface with competitive power-performance metrics with the economies of scale for services and technologies associated with an open ecosystem. |
| doi_str_mv | 10.1109/MM.2020.3040410 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_2483233040</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9271827</ieee_id><sourcerecordid>2483233040</sourcerecordid><originalsourceid>FETCH-LOGICAL-c1340-65a3d3cbe6985a7201a5cc3d93397e1acf1a433b077632369cc2756e8735b1dc3</originalsourceid><addsrcrecordid>eNo9kD1PwzAQQC0EEqUwM7BYYoEh7dnnxDEDUhvxUalRF1BHy3UdNaV1gpMM_fekasV0y3t3ukfIPYMRY6DGeT7iwGGEIEAwuCADplBGggm8JAPgkkdMIr8mN02zBYCYQzogrxNPF7XzdOZbF6JsU9Y719Ks2u87X1rTlpWn89L_vNBp5-2GVgVdlsE19GlaLZ9vyVVhdo27O88h-X5_-8o-o_niY5ZN5pFlKCBKYoNrtCuXqDQ2kgMzsbW4VohKOmZswYxAXIGUCXJMlLVcxolLJcYrtrY4JI-nvXWofjvXtHpbdcH3JzUXaa8cv-6p8YmyoWqa4Apdh3JvwkEz0MdIOs_1MZI-R-qNh5NROuf-acUlS7nEP603Xt4</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2483233040</pqid></control><display><type>article</type><title>An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW)</title><source>IEEE</source><creator>Ardalan, Shahab ; Farjadrad, Ramin ; Kuemerle, Mark ; Poulton, Ken ; Subramaniam, Suresh ; Vinnakota, Bapiraju</creator><creatorcontrib>Ardalan, Shahab ; Farjadrad, Ramin ; Kuemerle, Mark ; Poulton, Ken ; Subramaniam, Suresh ; Vinnakota, Bapiraju</creatorcontrib><description>Bunch of wires (BoW) is a new open die-to-die (D2D) interface that aims to gracefully tradeoff performance for design and packaging complexity across a wide range of process nodes. BoW performance can range from 320 Gb/s/mm with a simple design and packaging to 1+ Tb/s/mm with complex design and/or packaging. BoW directly enables heterogeneous integration, a primary advantage of chiplets. We discuss progress on BoW based on extensive design and performance studies by engineers from multiple companies. These studies aim to make BoW easy to use in a system. This open innovation project will deliver a low-complexity D2D interface with competitive power-performance metrics with the economies of scale for services and technologies associated with an open ecosystem.</description><identifier>ISSN: 0272-1732</identifier><identifier>EISSN: 1937-4143</identifier><identifier>DOI: 10.1109/MM.2020.3040410</identifier><identifier>CODEN: IEMIDZ</identifier><language>eng</language><publisher>Los Alamitos: IEEE</publisher><subject>BoW ; Bunch of Wires ; chip-tochip ; chiplet ; Clocks ; Complexity ; Complexity theory ; Device-to-device communication ; Die-to-Die ; Economies of scale ; interface ; MCM ; Packaging ; Packaging design ; Performance measurement ; Receivers ; Substrates ; Wires</subject><ispartof>IEEE MICRO, 2021-01, Vol.41 (1), p.54-60</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c1340-65a3d3cbe6985a7201a5cc3d93397e1acf1a433b077632369cc2756e8735b1dc3</citedby><cites>FETCH-LOGICAL-c1340-65a3d3cbe6985a7201a5cc3d93397e1acf1a433b077632369cc2756e8735b1dc3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9271827$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9271827$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ardalan, Shahab</creatorcontrib><creatorcontrib>Farjadrad, Ramin</creatorcontrib><creatorcontrib>Kuemerle, Mark</creatorcontrib><creatorcontrib>Poulton, Ken</creatorcontrib><creatorcontrib>Subramaniam, Suresh</creatorcontrib><creatorcontrib>Vinnakota, Bapiraju</creatorcontrib><title>An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW)</title><title>IEEE MICRO</title><addtitle>MM</addtitle><description>Bunch of wires (BoW) is a new open die-to-die (D2D) interface that aims to gracefully tradeoff performance for design and packaging complexity across a wide range of process nodes. BoW performance can range from 320 Gb/s/mm with a simple design and packaging to 1+ Tb/s/mm with complex design and/or packaging. BoW directly enables heterogeneous integration, a primary advantage of chiplets. We discuss progress on BoW based on extensive design and performance studies by engineers from multiple companies. These studies aim to make BoW easy to use in a system. This open innovation project will deliver a low-complexity D2D interface with competitive power-performance metrics with the economies of scale for services and technologies associated with an open ecosystem.</description><subject>BoW</subject><subject>Bunch of Wires</subject><subject>chip-tochip</subject><subject>chiplet</subject><subject>Clocks</subject><subject>Complexity</subject><subject>Complexity theory</subject><subject>Device-to-device communication</subject><subject>Die-to-Die</subject><subject>Economies of scale</subject><subject>interface</subject><subject>MCM</subject><subject>Packaging</subject><subject>Packaging design</subject><subject>Performance measurement</subject><subject>Receivers</subject><subject>Substrates</subject><subject>Wires</subject><issn>0272-1732</issn><issn>1937-4143</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kD1PwzAQQC0EEqUwM7BYYoEh7dnnxDEDUhvxUalRF1BHy3UdNaV1gpMM_fekasV0y3t3ukfIPYMRY6DGeT7iwGGEIEAwuCADplBGggm8JAPgkkdMIr8mN02zBYCYQzogrxNPF7XzdOZbF6JsU9Y719Ks2u87X1rTlpWn89L_vNBp5-2GVgVdlsE19GlaLZ9vyVVhdo27O88h-X5_-8o-o_niY5ZN5pFlKCBKYoNrtCuXqDQ2kgMzsbW4VohKOmZswYxAXIGUCXJMlLVcxolLJcYrtrY4JI-nvXWofjvXtHpbdcH3JzUXaa8cv-6p8YmyoWqa4Apdh3JvwkEz0MdIOs_1MZI-R-qNh5NROuf-acUlS7nEP603Xt4</recordid><startdate>202101</startdate><enddate>202101</enddate><creator>Ardalan, Shahab</creator><creator>Farjadrad, Ramin</creator><creator>Kuemerle, Mark</creator><creator>Poulton, Ken</creator><creator>Subramaniam, Suresh</creator><creator>Vinnakota, Bapiraju</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>202101</creationdate><title>An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW)</title><author>Ardalan, Shahab ; Farjadrad, Ramin ; Kuemerle, Mark ; Poulton, Ken ; Subramaniam, Suresh ; Vinnakota, Bapiraju</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1340-65a3d3cbe6985a7201a5cc3d93397e1acf1a433b077632369cc2756e8735b1dc3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BoW</topic><topic>Bunch of Wires</topic><topic>chip-tochip</topic><topic>chiplet</topic><topic>Clocks</topic><topic>Complexity</topic><topic>Complexity theory</topic><topic>Device-to-device communication</topic><topic>Die-to-Die</topic><topic>Economies of scale</topic><topic>interface</topic><topic>MCM</topic><topic>Packaging</topic><topic>Packaging design</topic><topic>Performance measurement</topic><topic>Receivers</topic><topic>Substrates</topic><topic>Wires</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ardalan, Shahab</creatorcontrib><creatorcontrib>Farjadrad, Ramin</creatorcontrib><creatorcontrib>Kuemerle, Mark</creatorcontrib><creatorcontrib>Poulton, Ken</creatorcontrib><creatorcontrib>Subramaniam, Suresh</creatorcontrib><creatorcontrib>Vinnakota, Bapiraju</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005–Present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE MICRO</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ardalan, Shahab</au><au>Farjadrad, Ramin</au><au>Kuemerle, Mark</au><au>Poulton, Ken</au><au>Subramaniam, Suresh</au><au>Vinnakota, Bapiraju</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW)</atitle><jtitle>IEEE MICRO</jtitle><stitle>MM</stitle><date>2021-01</date><risdate>2021</risdate><volume>41</volume><issue>1</issue><spage>54</spage><epage>60</epage><pages>54-60</pages><issn>0272-1732</issn><eissn>1937-4143</eissn><coden>IEMIDZ</coden><abstract>Bunch of wires (BoW) is a new open die-to-die (D2D) interface that aims to gracefully tradeoff performance for design and packaging complexity across a wide range of process nodes. BoW performance can range from 320 Gb/s/mm with a simple design and packaging to 1+ Tb/s/mm with complex design and/or packaging. BoW directly enables heterogeneous integration, a primary advantage of chiplets. We discuss progress on BoW based on extensive design and performance studies by engineers from multiple companies. These studies aim to make BoW easy to use in a system. This open innovation project will deliver a low-complexity D2D interface with competitive power-performance metrics with the economies of scale for services and technologies associated with an open ecosystem.</abstract><cop>Los Alamitos</cop><pub>IEEE</pub><doi>10.1109/MM.2020.3040410</doi><tpages>7</tpages></addata></record> |
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| issn | 0272-1732 1937-4143 |
| language | eng |
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| subjects | BoW Bunch of Wires chip-tochip chiplet Clocks Complexity Complexity theory Device-to-device communication Die-to-Die Economies of scale interface MCM Packaging Packaging design Performance measurement Receivers Substrates Wires |
| title | An Open Inter-Chiplet Communication Link: Bunch of Wires (BoW) |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-04T18%3A32%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=An%20Open%20Inter-Chiplet%20Communication%20Link:%20Bunch%20of%20Wires%20(BoW)&rft.jtitle=IEEE%20MICRO&rft.au=Ardalan,%20Shahab&rft.date=2021-01&rft.volume=41&rft.issue=1&rft.spage=54&rft.epage=60&rft.pages=54-60&rft.issn=0272-1732&rft.eissn=1937-4143&rft.coden=IEMIDZ&rft_id=info:doi/10.1109/MM.2020.3040410&rft_dat=%3Cproquest_RIE%3E2483233040%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2483233040&rft_id=info:pmid/&rft_ieee_id=9271827&rfr_iscdi=true |