In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective
In this article, we review the existing analog resistive switching memory (RSM) devices and their hardware technologies for in-memory learning, as well as their challenges and prospects. Since the characteristics of the devices are different for in-memory learning and digital memory applications, it...
Gespeichert in:
Veröffentlicht in: | Proceedings of the IEEE 2021-01, Vol.109 (1), p.14-42 |
---|---|
Hauptverfasser: | , , , , , , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 42 |
---|---|
container_issue | 1 |
container_start_page | 14 |
container_title | Proceedings of the IEEE |
container_volume | 109 |
creator | Xi, Yue Gao, Bin Tang, Jianshi Chen, An Chang, Meng-Fan Hu, Xiaobo Sharon Spiegel, Jan Van Der Qian, He Wu, Huaqiang |
description | In this article, we review the existing analog resistive switching memory (RSM) devices and their hardware technologies for in-memory learning, as well as their challenges and prospects. Since the characteristics of the devices are different for in-memory learning and digital memory applications, it is important to have an in-depth understanding across different layers from devices and circuits to architectures and algorithms. First, based on a top-down view from architecture to devices for analog computing, we define the main figures of merit (FoMs) and perform a comprehensive analysis of analog RSM hardware including the basic device characteristics, hardware algorithms, and the corresponding mapping methods for device arrays, as well as the architecture and circuit design considerations for neural networks. Second, we classify the FoMs of analog RSM devices into two levels. Level 1 FoMs are essential for achieving the functionality of a system (e.g., linearity, symmetry, dynamic range, level numbers, fluctuation, variability, and yield). Level 2 FoMs are those that make a functional system more efficient and reliable (e.g., area, operational voltage, energy consumption, speed, endurance, retention, and compatibility with back-end-of-line processing). By constructing a device-to-application simulation framework, we perform an in-depth analysis of how these FoMs influence in-memory learning and give a target list of the device requirements. Lastly, we evaluate the main FoMs of most existing devices with analog characteristics and review optimization methods from programming schemes to materials and device structures. The key challenges and prospects from the device to system level for analog RSM devices are discussed. |
doi_str_mv | 10.1109/JPROC.2020.3004543 |
format | Article |
fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_2471919302</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9138706</ieee_id><sourcerecordid>2471919302</sourcerecordid><originalsourceid>FETCH-LOGICAL-c344t-1c93c17ff5a709db215614c389c55458baf5ae882801483298b05f664adc20b63</originalsourceid><addsrcrecordid>eNo9kE1PAjEQhhujiYj-Ab008bw4_dzWGyF-YDAQ0HPTLV1YIrvYLhD-vbtAPE0y7_NOJg9C9wR6hIB--phMx4MeBQo9BsAFZxeoQ4RQCaVCXqIOAFGJpkRfo5sYVwDAhGQdNBuWydqvq3DAI29DWZQLvC_qJe6X9qda4KmPRayLncezZu2Wbf555J9xv0l3hd9jW87xxIe48a5Fb9FVbn-ivzvPLvp-ffkavCej8dtw0B8ljnFeJ8Rp5kia58KmoOcZJUIS7pjSTgguVGabxCtFFRCuGNUqA5FLye3cUcgk66LH091NqH63PtZmVW1D83c0lKdEE82ANhQ9US5UMQafm00o1jYcDAHTyjNHeaaVZ87ymtLDqVR47_8LmjCVgmR_gHtp3Q</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2471919302</pqid></control><display><type>article</type><title>In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective</title><source>IEEE Electronic Library (IEL)</source><creator>Xi, Yue ; Gao, Bin ; Tang, Jianshi ; Chen, An ; Chang, Meng-Fan ; Hu, Xiaobo Sharon ; Spiegel, Jan Van Der ; Qian, He ; Wu, Huaqiang</creator><creatorcontrib>Xi, Yue ; Gao, Bin ; Tang, Jianshi ; Chen, An ; Chang, Meng-Fan ; Hu, Xiaobo Sharon ; Spiegel, Jan Van Der ; Qian, He ; Wu, Huaqiang</creatorcontrib><description>In this article, we review the existing analog resistive switching memory (RSM) devices and their hardware technologies for in-memory learning, as well as their challenges and prospects. Since the characteristics of the devices are different for in-memory learning and digital memory applications, it is important to have an in-depth understanding across different layers from devices and circuits to architectures and algorithms. First, based on a top-down view from architecture to devices for analog computing, we define the main figures of merit (FoMs) and perform a comprehensive analysis of analog RSM hardware including the basic device characteristics, hardware algorithms, and the corresponding mapping methods for device arrays, as well as the architecture and circuit design considerations for neural networks. Second, we classify the FoMs of analog RSM devices into two levels. Level 1 FoMs are essential for achieving the functionality of a system (e.g., linearity, symmetry, dynamic range, level numbers, fluctuation, variability, and yield). Level 2 FoMs are those that make a functional system more efficient and reliable (e.g., area, operational voltage, energy consumption, speed, endurance, retention, and compatibility with back-end-of-line processing). By constructing a device-to-application simulation framework, we perform an in-depth analysis of how these FoMs influence in-memory learning and give a target list of the device requirements. Lastly, we evaluate the main FoMs of most existing devices with analog characteristics and review optimization methods from programming schemes to materials and device structures. The key challenges and prospects from the device to system level for analog RSM devices are discussed.</description><identifier>ISSN: 0018-9219</identifier><identifier>EISSN: 1558-2256</identifier><identifier>DOI: 10.1109/JPROC.2020.3004543</identifier><identifier>CODEN: IEEPAD</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Algorithms ; Analog resistive switching memory (RSM) ; Artificial intelligence ; Circuit design ; Computer architecture ; Conductivity measurement ; Energy consumption ; Hardware ; in-memory learning ; Learning ; Learning systems ; Linearity ; Memory devices ; Neural networks ; neuromorphic computing ; Neuromorphic engineering ; Optimization ; Performance evaluation ; Random access memory ; resistive switching ; Switching</subject><ispartof>Proceedings of the IEEE, 2021-01, Vol.109 (1), p.14-42</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c344t-1c93c17ff5a709db215614c389c55458baf5ae882801483298b05f664adc20b63</citedby><cites>FETCH-LOGICAL-c344t-1c93c17ff5a709db215614c389c55458baf5ae882801483298b05f664adc20b63</cites><orcidid>0000-0002-6636-9738 ; 0000-0002-2417-983X ; 0000-0001-8359-7997 ; 0000-0001-8369-0067 ; 0000-0001-5027-7938 ; 0000-0002-6070-0717 ; 0000-0001-6905-6350</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9138706$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9138706$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Xi, Yue</creatorcontrib><creatorcontrib>Gao, Bin</creatorcontrib><creatorcontrib>Tang, Jianshi</creatorcontrib><creatorcontrib>Chen, An</creatorcontrib><creatorcontrib>Chang, Meng-Fan</creatorcontrib><creatorcontrib>Hu, Xiaobo Sharon</creatorcontrib><creatorcontrib>Spiegel, Jan Van Der</creatorcontrib><creatorcontrib>Qian, He</creatorcontrib><creatorcontrib>Wu, Huaqiang</creatorcontrib><title>In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective</title><title>Proceedings of the IEEE</title><addtitle>JPROC</addtitle><description>In this article, we review the existing analog resistive switching memory (RSM) devices and their hardware technologies for in-memory learning, as well as their challenges and prospects. Since the characteristics of the devices are different for in-memory learning and digital memory applications, it is important to have an in-depth understanding across different layers from devices and circuits to architectures and algorithms. First, based on a top-down view from architecture to devices for analog computing, we define the main figures of merit (FoMs) and perform a comprehensive analysis of analog RSM hardware including the basic device characteristics, hardware algorithms, and the corresponding mapping methods for device arrays, as well as the architecture and circuit design considerations for neural networks. Second, we classify the FoMs of analog RSM devices into two levels. Level 1 FoMs are essential for achieving the functionality of a system (e.g., linearity, symmetry, dynamic range, level numbers, fluctuation, variability, and yield). Level 2 FoMs are those that make a functional system more efficient and reliable (e.g., area, operational voltage, energy consumption, speed, endurance, retention, and compatibility with back-end-of-line processing). By constructing a device-to-application simulation framework, we perform an in-depth analysis of how these FoMs influence in-memory learning and give a target list of the device requirements. Lastly, we evaluate the main FoMs of most existing devices with analog characteristics and review optimization methods from programming schemes to materials and device structures. The key challenges and prospects from the device to system level for analog RSM devices are discussed.</description><subject>Algorithms</subject><subject>Analog resistive switching memory (RSM)</subject><subject>Artificial intelligence</subject><subject>Circuit design</subject><subject>Computer architecture</subject><subject>Conductivity measurement</subject><subject>Energy consumption</subject><subject>Hardware</subject><subject>in-memory learning</subject><subject>Learning</subject><subject>Learning systems</subject><subject>Linearity</subject><subject>Memory devices</subject><subject>Neural networks</subject><subject>neuromorphic computing</subject><subject>Neuromorphic engineering</subject><subject>Optimization</subject><subject>Performance evaluation</subject><subject>Random access memory</subject><subject>resistive switching</subject><subject>Switching</subject><issn>0018-9219</issn><issn>1558-2256</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1PAjEQhhujiYj-Ab008bw4_dzWGyF-YDAQ0HPTLV1YIrvYLhD-vbtAPE0y7_NOJg9C9wR6hIB--phMx4MeBQo9BsAFZxeoQ4RQCaVCXqIOAFGJpkRfo5sYVwDAhGQdNBuWydqvq3DAI29DWZQLvC_qJe6X9qda4KmPRayLncezZu2Wbf555J9xv0l3hd9jW87xxIe48a5Fb9FVbn-ivzvPLvp-ffkavCej8dtw0B8ljnFeJ8Rp5kia58KmoOcZJUIS7pjSTgguVGabxCtFFRCuGNUqA5FLye3cUcgk66LH091NqH63PtZmVW1D83c0lKdEE82ANhQ9US5UMQafm00o1jYcDAHTyjNHeaaVZ87ymtLDqVR47_8LmjCVgmR_gHtp3Q</recordid><startdate>202101</startdate><enddate>202101</enddate><creator>Xi, Yue</creator><creator>Gao, Bin</creator><creator>Tang, Jianshi</creator><creator>Chen, An</creator><creator>Chang, Meng-Fan</creator><creator>Hu, Xiaobo Sharon</creator><creator>Spiegel, Jan Van Der</creator><creator>Qian, He</creator><creator>Wu, Huaqiang</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-6636-9738</orcidid><orcidid>https://orcid.org/0000-0002-2417-983X</orcidid><orcidid>https://orcid.org/0000-0001-8359-7997</orcidid><orcidid>https://orcid.org/0000-0001-8369-0067</orcidid><orcidid>https://orcid.org/0000-0001-5027-7938</orcidid><orcidid>https://orcid.org/0000-0002-6070-0717</orcidid><orcidid>https://orcid.org/0000-0001-6905-6350</orcidid></search><sort><creationdate>202101</creationdate><title>In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective</title><author>Xi, Yue ; Gao, Bin ; Tang, Jianshi ; Chen, An ; Chang, Meng-Fan ; Hu, Xiaobo Sharon ; Spiegel, Jan Van Der ; Qian, He ; Wu, Huaqiang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c344t-1c93c17ff5a709db215614c389c55458baf5ae882801483298b05f664adc20b63</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Algorithms</topic><topic>Analog resistive switching memory (RSM)</topic><topic>Artificial intelligence</topic><topic>Circuit design</topic><topic>Computer architecture</topic><topic>Conductivity measurement</topic><topic>Energy consumption</topic><topic>Hardware</topic><topic>in-memory learning</topic><topic>Learning</topic><topic>Learning systems</topic><topic>Linearity</topic><topic>Memory devices</topic><topic>Neural networks</topic><topic>neuromorphic computing</topic><topic>Neuromorphic engineering</topic><topic>Optimization</topic><topic>Performance evaluation</topic><topic>Random access memory</topic><topic>resistive switching</topic><topic>Switching</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Xi, Yue</creatorcontrib><creatorcontrib>Gao, Bin</creatorcontrib><creatorcontrib>Tang, Jianshi</creatorcontrib><creatorcontrib>Chen, An</creatorcontrib><creatorcontrib>Chang, Meng-Fan</creatorcontrib><creatorcontrib>Hu, Xiaobo Sharon</creatorcontrib><creatorcontrib>Spiegel, Jan Van Der</creatorcontrib><creatorcontrib>Qian, He</creatorcontrib><creatorcontrib>Wu, Huaqiang</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Proceedings of the IEEE</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Xi, Yue</au><au>Gao, Bin</au><au>Tang, Jianshi</au><au>Chen, An</au><au>Chang, Meng-Fan</au><au>Hu, Xiaobo Sharon</au><au>Spiegel, Jan Van Der</au><au>Qian, He</au><au>Wu, Huaqiang</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective</atitle><jtitle>Proceedings of the IEEE</jtitle><stitle>JPROC</stitle><date>2021-01</date><risdate>2021</risdate><volume>109</volume><issue>1</issue><spage>14</spage><epage>42</epage><pages>14-42</pages><issn>0018-9219</issn><eissn>1558-2256</eissn><coden>IEEPAD</coden><abstract>In this article, we review the existing analog resistive switching memory (RSM) devices and their hardware technologies for in-memory learning, as well as their challenges and prospects. Since the characteristics of the devices are different for in-memory learning and digital memory applications, it is important to have an in-depth understanding across different layers from devices and circuits to architectures and algorithms. First, based on a top-down view from architecture to devices for analog computing, we define the main figures of merit (FoMs) and perform a comprehensive analysis of analog RSM hardware including the basic device characteristics, hardware algorithms, and the corresponding mapping methods for device arrays, as well as the architecture and circuit design considerations for neural networks. Second, we classify the FoMs of analog RSM devices into two levels. Level 1 FoMs are essential for achieving the functionality of a system (e.g., linearity, symmetry, dynamic range, level numbers, fluctuation, variability, and yield). Level 2 FoMs are those that make a functional system more efficient and reliable (e.g., area, operational voltage, energy consumption, speed, endurance, retention, and compatibility with back-end-of-line processing). By constructing a device-to-application simulation framework, we perform an in-depth analysis of how these FoMs influence in-memory learning and give a target list of the device requirements. Lastly, we evaluate the main FoMs of most existing devices with analog characteristics and review optimization methods from programming schemes to materials and device structures. The key challenges and prospects from the device to system level for analog RSM devices are discussed.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JPROC.2020.3004543</doi><tpages>29</tpages><orcidid>https://orcid.org/0000-0002-6636-9738</orcidid><orcidid>https://orcid.org/0000-0002-2417-983X</orcidid><orcidid>https://orcid.org/0000-0001-8359-7997</orcidid><orcidid>https://orcid.org/0000-0001-8369-0067</orcidid><orcidid>https://orcid.org/0000-0001-5027-7938</orcidid><orcidid>https://orcid.org/0000-0002-6070-0717</orcidid><orcidid>https://orcid.org/0000-0001-6905-6350</orcidid></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0018-9219 |
ispartof | Proceedings of the IEEE, 2021-01, Vol.109 (1), p.14-42 |
issn | 0018-9219 1558-2256 |
language | eng |
recordid | cdi_proquest_journals_2471919302 |
source | IEEE Electronic Library (IEL) |
subjects | Algorithms Analog resistive switching memory (RSM) Artificial intelligence Circuit design Computer architecture Conductivity measurement Energy consumption Hardware in-memory learning Learning Learning systems Linearity Memory devices Neural networks neuromorphic computing Neuromorphic engineering Optimization Performance evaluation Random access memory resistive switching Switching |
title | In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-19T04%3A56%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=In-memory%20Learning%20with%20Analog%20Resistive%20Switching%20Memory:%20A%20Review%20and%20Perspective&rft.jtitle=Proceedings%20of%20the%20IEEE&rft.au=Xi,%20Yue&rft.date=2021-01&rft.volume=109&rft.issue=1&rft.spage=14&rft.epage=42&rft.pages=14-42&rft.issn=0018-9219&rft.eissn=1558-2256&rft.coden=IEEPAD&rft_id=info:doi/10.1109/JPROC.2020.3004543&rft_dat=%3Cproquest_RIE%3E2471919302%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2471919302&rft_id=info:pmid/&rft_ieee_id=9138706&rfr_iscdi=true |