A 28-nm CMOS 12-Bit 250-MS/s Voltage-Current-Time Domain 3-Stage Pipelined ADC

This brief introduces a voltage-current-time (V-I-T) 3-domain 3-stage pipelined analog-to-digital converter (ADC) that exploits both the current-domain and the time-domain residue processing for speed enhancement. An open-loop current-time (I-T) pipeline with a calibration-free time-to-digital conve...

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Bibliographische Detailangaben
Veröffentlicht in:	IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2020-12, Vol.67 (12), p.2843-2847
Hauptverfasser:	Moon, Kyoung-Jun, Oh, Dong-Ryeol, Choi, Michael, Ryu, Seung-Tak
Format:	Artikel
Sprache:	eng
Schlagworte:	Analog to digital conversion Analog to digital converters Analog-digital conversion Analog-to-digital converter (ADC) Calibration Circuits and systems CMOS current-to-time converter Detectors Electric potential Linearity open-loop current-time pipelining Pipeline processing pipelined ADC Residues Signal processing Time domain analysis time-to-digital converter Voltage voltage-current-time domain
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