Using the MSET Device to Counteract Power-Analysis Attacks
One pivotal countermeasure in dealing with side-channel power analysis attacks is to maintain the signal-to-noise ratio of the power readings associated with the target as data-independent and as low as possible, in order to limit the attacker's ability to deduce meaningful information from the...
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Veröffentlicht in: | IEEE journal of the Electron Devices Society 2020, Vol.8, p.1328-1334 |
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creator | Peled, Assaf David, Liron Amrani, Ofer Rosenwaks, Yossi Wool, Avishai |
description | One pivotal countermeasure in dealing with side-channel power analysis attacks is to maintain the signal-to-noise ratio of the power readings associated with the target as data-independent and as low as possible, in order to limit the attacker's ability to deduce meaningful information from the target. The following study shows that the MSET (Multiple-State Electrostatically-Formed Nanowire Transistor) device achieves these two desired outcomes by virtue of its low-power characteristics, therefore having an inherent advantage in terms of side channel attacks over prevalent technologies. This advantage is tested with an SRAM cell and a memory register. Using correlation metrics, the correlation coefficient of the Hamming distance to the power dissipation in the register - at the adversary's point of observation - is shown to be close to zero over multiple power traces, when the register is implemented in MSET technology. |
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subjects | Correlation coefficients Logic gates low-power transistors MOSFET MSET Nanowires Power demand Power management power-analysis attacks Resistors side-channel attacks Signal to noise ratio Silicon-on-insulator Static random access memory Transistors |
title | Using the MSET Device to Counteract Power-Analysis Attacks |
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