Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection

Reliable computer systems employ error control codes (ECCs) to protect information from errors. For example, memories are frequently protected using single error correction-double error detection (SEC-DED) codes. ECCs are traditionally designed to minimize the number of redundant bits, as they are a...

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Veröffentlicht in:	IEEE access 2019, Vol.7, p.151131-151143
Hauptverfasser:	Saiz-Adalid, Luis-J., Gracia-Moran, Joaquin, Gil-Tomas, Daniel, Baraza-Calvo, J.-Carlos, Gil-Vicente, Pedro-J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Adjacent error correction Decoding Delays double error detection Encoding error control codes Error correction Error correction & detection Error correction codes Error detection fast codes Power consumption Redundancy Registers reliability Silicon
Online-Zugang:	Volltext
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