ESD-Performance Enhancement of Circular Ultra-High-Voltage 300-V N-Channel Lateral-Diffused MOSFETs by Source/Drain Embedded Schottky Diodes
This study with the area-efficient design for improving electrostatic discharge (ESD) and Latch-up (LU) abilities in the ultra-high voltage (UHV) n-channel Lateral-Diffused MOSFET (nLDMOS) is investigated via a TSMC 0.5- \mu \text{m} UHV Bipolar CMOS DMOS (BCD) process. There are two architectures...
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| Veröffentlicht in: | IEEE electron device letters 2020-11, Vol.41 (11), p.1673-1676 |
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| creator | Lin, Po-Lin Chen, Shen-Li Fan, Sheng-Kai |
| description | This study with the area-efficient design for improving electrostatic discharge (ESD) and Latch-up (LU) abilities in the ultra-high voltage (UHV) n-channel Lateral-Diffused MOSFET (nLDMOS) is investigated via a TSMC 0.5- \mu \text{m} UHV Bipolar CMOS DMOS (BCD) process. There are two architectures of these nLDMOS devices with embedded Schottky diodes in the electrode area. Firstly, the drain side is divided into three concentric circles and embedded with Schottky diodes. The influence of these samples with different layout arrangements on ESD is evaluated. For the second item, UHV nLDMOS devices with the source side embedded Schottky diodes by two alternative layout types are developed. Experimental results showed that an UHV nLDMOS with embedded Schottky diodes at the drain side can significantly improve ESD ability, especially for the fully embedded Schottky diodes at the drain side (being with the highest figure of merit (FOM) value in the ESD, LU, and cell-area considerations). On the other hand, with embedded Schottky diodes at the source side can increase the holding voltage which can effectively improve the LU immunity. |
| doi_str_mv | 10.1109/LED.2020.3023021 |
| format | Article |
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There are two architectures of these nLDMOS devices with embedded Schottky diodes in the electrode area. Firstly, the drain side is divided into three concentric circles and embedded with Schottky diodes. The influence of these samples with different layout arrangements on ESD is evaluated. For the second item, UHV nLDMOS devices with the source side embedded Schottky diodes by two alternative layout types are developed. Experimental results showed that an UHV nLDMOS with embedded Schottky diodes at the drain side can significantly improve ESD ability, especially for the fully embedded Schottky diodes at the drain side (being with the highest figure of merit (FOM) value in the ESD, LU, and cell-area considerations). On the other hand, with embedded Schottky diodes at the source side can increase the holding voltage which can effectively improve the LU immunity.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2020.3023021</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Breakdown voltage ; CMOS ; Electrodes ; Electrostatic discharge (ESD) ; Electrostatic discharges ; Equivalent circuits ; Figure of merit ; High voltages ; holding voltage (Vₕ) ; human-body model (HBM) ; Latch-up ; latch-up (LU) ; Layout ; Layouts ; MOSFETs ; N-channel lateral-diffused MOSFET (nLDMOS) ; Schottky diodes ; Static electricity ; Testing ; transmission-line pulse (TLP) ; ultra-high voltage (UHV)</subject><ispartof>IEEE electron device letters, 2020-11, Vol.41 (11), p.1673-1676</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c244t-499f7065601a9b2faf6ea2d8337c08d1390a4afb8acabfd5d28c8c4910bdba983</cites><orcidid>0000-0002-1814-6986 ; 0000-0002-7559-358X ; 0000-0001-7860-3889</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9189945$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9189945$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lin, Po-Lin</creatorcontrib><creatorcontrib>Chen, Shen-Li</creatorcontrib><creatorcontrib>Fan, Sheng-Kai</creatorcontrib><title>ESD-Performance Enhancement of Circular Ultra-High-Voltage 300-V N-Channel Lateral-Diffused MOSFETs by Source/Drain Embedded Schottky Diodes</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>This study with the area-efficient design for improving electrostatic discharge (ESD) and Latch-up (LU) abilities in the ultra-high voltage (UHV) n-channel Lateral-Diffused MOSFET (nLDMOS) is investigated via a TSMC 0.5-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> UHV Bipolar CMOS DMOS (BCD) process. There are two architectures of these nLDMOS devices with embedded Schottky diodes in the electrode area. Firstly, the drain side is divided into three concentric circles and embedded with Schottky diodes. The influence of these samples with different layout arrangements on ESD is evaluated. For the second item, UHV nLDMOS devices with the source side embedded Schottky diodes by two alternative layout types are developed. Experimental results showed that an UHV nLDMOS with embedded Schottky diodes at the drain side can significantly improve ESD ability, especially for the fully embedded Schottky diodes at the drain side (being with the highest figure of merit (FOM) value in the ESD, LU, and cell-area considerations). On the other hand, with embedded Schottky diodes at the source side can increase the holding voltage which can effectively improve the LU immunity.</description><subject>Breakdown voltage</subject><subject>CMOS</subject><subject>Electrodes</subject><subject>Electrostatic discharge (ESD)</subject><subject>Electrostatic discharges</subject><subject>Equivalent circuits</subject><subject>Figure of merit</subject><subject>High voltages</subject><subject>holding voltage (Vₕ)</subject><subject>human-body model (HBM)</subject><subject>Latch-up</subject><subject>latch-up (LU)</subject><subject>Layout</subject><subject>Layouts</subject><subject>MOSFETs</subject><subject>N-channel lateral-diffused MOSFET (nLDMOS)</subject><subject>Schottky diodes</subject><subject>Static electricity</subject><subject>Testing</subject><subject>transmission-line pulse (TLP)</subject><subject>ultra-high voltage (UHV)</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1r3DAQhkVJIZu090Avgpy1GVnyh45l7SSFbVPYJlczlkZZp147kbyH_Q_50dWyoTDwXp5nZngZu5KwlBLMzbqplxlksFSQpZGf2ELmeSUgL9QZW0CppVASinN2EeMLgNS61Av23mxq8ZuCn8IOR0u8GbfH3NE488nzVR_sfsDAH4c5oLjvn7fiaRpmfCauAMQT_yVWyRhp4GucKeAg6t77fSTHfz5sbps_kXcHvpn2wdJNHbAfebPryLkEbOx2mue_B173k6P4hX32OET6-pGX7DH5q3uxfrj7sfq-FjbTehbaGF9CkRcg0XSZR18QZq5SqrRQOakMoEbfVWix8y53WWUrq42EznVoKnXJrk97X8P0tqc4ty_pvTGdbDOda10YU-pEwYmyYYoxkG9fQ7_DcGgltMfO29R5e-y8_eg8Kd9OSk9E_3EjK2N0rv4B7F98ug</recordid><startdate>20201101</startdate><enddate>20201101</enddate><creator>Lin, Po-Lin</creator><creator>Chen, Shen-Li</creator><creator>Fan, Sheng-Kai</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-1814-6986</orcidid><orcidid>https://orcid.org/0000-0002-7559-358X</orcidid><orcidid>https://orcid.org/0000-0001-7860-3889</orcidid></search><sort><creationdate>20201101</creationdate><title>ESD-Performance Enhancement of Circular Ultra-High-Voltage 300-V N-Channel Lateral-Diffused MOSFETs by Source/Drain Embedded Schottky Diodes</title><author>Lin, Po-Lin ; Chen, Shen-Li ; Fan, Sheng-Kai</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c244t-499f7065601a9b2faf6ea2d8337c08d1390a4afb8acabfd5d28c8c4910bdba983</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Breakdown voltage</topic><topic>CMOS</topic><topic>Electrodes</topic><topic>Electrostatic discharge (ESD)</topic><topic>Electrostatic discharges</topic><topic>Equivalent circuits</topic><topic>Figure of merit</topic><topic>High voltages</topic><topic>holding voltage (Vₕ)</topic><topic>human-body model (HBM)</topic><topic>Latch-up</topic><topic>latch-up (LU)</topic><topic>Layout</topic><topic>Layouts</topic><topic>MOSFETs</topic><topic>N-channel lateral-diffused MOSFET (nLDMOS)</topic><topic>Schottky diodes</topic><topic>Static electricity</topic><topic>Testing</topic><topic>transmission-line pulse (TLP)</topic><topic>ultra-high voltage (UHV)</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lin, Po-Lin</creatorcontrib><creatorcontrib>Chen, Shen-Li</creatorcontrib><creatorcontrib>Fan, Sheng-Kai</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lin, Po-Lin</au><au>Chen, Shen-Li</au><au>Fan, Sheng-Kai</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>ESD-Performance Enhancement of Circular Ultra-High-Voltage 300-V N-Channel Lateral-Diffused MOSFETs by Source/Drain Embedded Schottky Diodes</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2020-11-01</date><risdate>2020</risdate><volume>41</volume><issue>11</issue><spage>1673</spage><epage>1676</epage><pages>1673-1676</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>This study with the area-efficient design for improving electrostatic discharge (ESD) and Latch-up (LU) abilities in the ultra-high voltage (UHV) n-channel Lateral-Diffused MOSFET (nLDMOS) is investigated via a TSMC 0.5-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> UHV Bipolar CMOS DMOS (BCD) process. There are two architectures of these nLDMOS devices with embedded Schottky diodes in the electrode area. Firstly, the drain side is divided into three concentric circles and embedded with Schottky diodes. The influence of these samples with different layout arrangements on ESD is evaluated. For the second item, UHV nLDMOS devices with the source side embedded Schottky diodes by two alternative layout types are developed. Experimental results showed that an UHV nLDMOS with embedded Schottky diodes at the drain side can significantly improve ESD ability, especially for the fully embedded Schottky diodes at the drain side (being with the highest figure of merit (FOM) value in the ESD, LU, and cell-area considerations). On the other hand, with embedded Schottky diodes at the source side can increase the holding voltage which can effectively improve the LU immunity.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2020.3023021</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0002-1814-6986</orcidid><orcidid>https://orcid.org/0000-0002-7559-358X</orcidid><orcidid>https://orcid.org/0000-0001-7860-3889</orcidid></addata></record> |
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| subjects | Breakdown voltage CMOS Electrodes Electrostatic discharge (ESD) Electrostatic discharges Equivalent circuits Figure of merit High voltages holding voltage (Vₕ) human-body model (HBM) Latch-up latch-up (LU) Layout Layouts MOSFETs N-channel lateral-diffused MOSFET (nLDMOS) Schottky diodes Static electricity Testing transmission-line pulse (TLP) ultra-high voltage (UHV) |
| title | ESD-Performance Enhancement of Circular Ultra-High-Voltage 300-V N-Channel Lateral-Diffused MOSFETs by Source/Drain Embedded Schottky Diodes |
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