HeteroYARN: A Heterogeneous FPGA-Accelerated Architecture Based on YARN

In recent years, the heterogeneous distributed platform integrating with FPGAs to accelerate computation tasks has been widely studied to deal with the deluge of data. However, most of current works suffer from poor universality and low resource utilization that run specific algorithms with the high...

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Veröffentlicht in:IEEE transactions on parallel and distributed systems 2020-12, Vol.31 (12), p.2968-2980
Hauptverfasser: Li, Ruixuan, Yang, Qi, Li, Yuhua, Gu, Xiwu, Xiao, Weijun, Li, Keqin
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container_end_page 2980
container_issue 12
container_start_page 2968
container_title IEEE transactions on parallel and distributed systems
container_volume 31
creator Li, Ruixuan
Yang, Qi
Li, Yuhua
Gu, Xiwu
Xiao, Weijun
Li, Keqin
description In recent years, the heterogeneous distributed platform integrating with FPGAs to accelerate computation tasks has been widely studied to deal with the deluge of data. However, most of current works suffer from poor universality and low resource utilization that run specific algorithms with the highly customized structure. Moreover, there are still many challenges, such as data curation, task scheduling, and resource management, which further limit the scalability of a CPU-FPGA distributed platform. In this paper, we present HeteroYARN, an FPGA-accelerated heterogeneous architecture based on YARN platform, which provides resource management and programming support for computing-intensive applications using FPGAs. In particular, the HeteroYARN abstracts FPGA accelerators as general resources and provides programming APIs to utilize those accelerators easily. Our HeteroYARN simplifies the request and usage of FPGA resources to enhance the efficiency of the heterogeneous framework while maintaining previous workflow unchanged. Experimental results using two representative algorithms, K-means and Naive Bayes classifier, which are accelerated by FPGAs, demonstrate the usability of the HeteroYARN framework and show performance speedup improvement by 7.5x (K-means) and 2.3x (Naive Bayes) respectively compared to conventional CPU-only applications provided by Mahout.
doi_str_mv 10.1109/TPDS.2019.2905201
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subjects Accelerators
Algorithms
Computer architecture
data-intensive computing
Field programmable gate arrays
FPGA-accelerated computing
heterogeneous FPGA architecture
Heterogeneous system
Processor scheduling
Resource management
Resource scheduling
Resource utilization
Scheduling
Task analysis
Task scheduling
Workflow
Yarn
title HeteroYARN: A Heterogeneous FPGA-Accelerated Architecture Based on YARN
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