Experimental Study on Mitigation of Lifetime-Limiting Dielectric Cracking in Extreme Temperature 4H-SiC JFET Integrated Circuits

While NASA Glenn Research Center’s “Generation 10” 4H-SiC Junction Field Effect Transistor (JFET) integrated circuits (ICs) have uniquely demonstrated 500 °C electrical operation for durations of over a year, this experimental work has also revealed that physical cracking of chip dielectric passivat...

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Veröffentlicht in:	Materials science forum 2020-07, Vol.1004, p.1148-1155
Hauptverfasser:	Neudeck, Philip G., Spry, David J., Chang, Carl W.
Format:	Artikel
Sprache:	eng
Schlagworte:	Accelerated tests Cracks Dielectrics Extreme environments Field effect transistors High temperature Integrated circuits JFET Ovens Passivity Research facilities Semiconductor devices Technology adoption Technology utilization Temperature
Online-Zugang:	Volltext
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