Development of Multiobjective High-Level Synthesis for FPGAs

Traditionally, the High-Level Synthesis (HLS) for Field Programmable Gate Array (FPGA) devices is a methodology that transforms a behavioral description, as the timing-independent specification, to an abstraction level that is synthesizable, like the Register Transfer Level. This process can be perf...

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Veröffentlicht in:	Scientific programming 2020, Vol.2020 (2020), p.1-25
Hauptverfasser:	Reyes Fernandez de Bulnes, Darian, Trujillo, Leonardo, Maldonado, Yazmin
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Architecture Circuit design Design Digital electronics Experimentation Field programmable gate arrays High level synthesis Intellectual property Multiple objective analysis Noise Optimization Scheduling Software Wire drawing
Online-Zugang:	Volltext
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