A 373-F2 0.21%-Native-BER EE SRAM Physically Unclonable Function With 2-D Power-Gated Bit Cells and } Bias-Based Dark-Bit Detection

This article presents a highly stable SRAM-based physically unclonable function (PUF) using enhancement-enhancement (EE)-structure bit cells for native stability improvement. The PUF bit cells are power-gated 2-D and are normally in the OFF state, which largely reduces power and is beneficial to att...

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Veröffentlicht in:IEEE journal of solid-state circuits 2020-06, Vol.55 (6), p.1719-1732
Hauptverfasser: Liu, Kunyang, Min, Yue, Yang, Xuan, Sun, Hanfeng, Shinohara, Hirofumi
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container_issue 6
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container_title IEEE journal of solid-state circuits
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creator Liu, Kunyang
Min, Yue
Yang, Xuan
Sun, Hanfeng
Shinohara, Hirofumi
description This article presents a highly stable SRAM-based physically unclonable function (PUF) using enhancement-enhancement (EE)-structure bit cells for native stability improvement. The PUF bit cells are power-gated 2-D and are normally in the OFF state, which largely reduces power and is beneficial to attack tolerance. In addition, a dark-bit detection technique based on a lightweight integrated {V}_{\text {SS}} -bias generator is implemented in order to screen out potentially unstable bit cells (dark bits) induced by supply voltage/temperature (VT) variations and other factors. Measured native bit error rate (BER) of prototype chips fabricated in 130-nm standard CMOS is 0.21% at 0.8 V and 23 °C, which is 14 \times better compared with the conventional SRAM-based PUF. After masking the detected dark bits, no bit error (3339 bits \times 500 evaluations) appeared at the worst VT corner across 0.8 to 1.4 V and −40 °C to 120 °C. This technique also eliminated all unstable bits in the accelerated aging test. Both the data before and after dark-bit masking have passed all applicable NIST SP 800-22 randomness tests. The measured operational energy at 0.8 V is 128 fJ/bit and the standby power is 0.44 pW/bit, thanks to the 2-D power-gating scheme. The nMOS-only bit cell is highly compact, with a normalized bit cell area of 373 F 2 .
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subjects Accelerated aging tests
Accelerated tests
Bias
Bit error rate
Chip formation
Circuit stability
CMOS
Dark-bit masking
enhancement-enhancement (EE) SRAM
Error analysis
hardware security
Internet-of-Things (IoT)
Inverters
Masking
Metal oxide semiconductors
physically unclonable function (PUF)
power gating
Random access memory
Security
Stability analysis
Static random access memory
Thermal stability
Transistors
title A 373-F2 0.21%-Native-BER EE SRAM Physically Unclonable Function With 2-D Power-Gated Bit Cells and } Bias-Based Dark-Bit Detection
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