A wideband blocker-resilient direct delta sigma receiver with selective input-impedance matching
This paper presents a wideband blocker-tolerant direct Δ Σ receiver (DDSR). Blockers are attenuated through selective input impedance matching and reduced gain design. The selective input impedance profile provides a low impedance at blocker frequencies enabling blocker attenuation, while the in-ban...
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Veröffentlicht in: | Analog integrated circuits and signal processing 2020-04, Vol.103 (1), p.195-207 |
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creator | Ul Haq, Faizan Englund, Mikko Östman, Kim B. Stadius, Kari Kosunen, Marko Koli, Kimmo Ryynänen, Jussi |
description | This paper presents a wideband blocker-tolerant direct
Δ
Σ
receiver (DDSR). Blockers are attenuated through selective input impedance matching and reduced gain design. The selective input impedance profile provides a low impedance at blocker frequencies enabling blocker attenuation, while the in-band impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. In addition, with the help of reduced gain design, near band blocker gain is minimized, further improving the blocker resilience. The receiver is designed for configurable operation from 0.7–2.7 GHz and a baseband bandwidth of 10 MHz. Simulated in a 28 nm technology, the DDSR demonstrates a maximum noise figure of 6.2 dB, and achieves a peak SNDR of 53 dB with an out-of-band 1 dB input compression point of
-
11
dBm at a 100 MHz offset. |
doi_str_mv | 10.1007/s10470-020-01611-2 |
format | Article |
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Δ
Σ
receiver (DDSR). Blockers are attenuated through selective input impedance matching and reduced gain design. The selective input impedance profile provides a low impedance at blocker frequencies enabling blocker attenuation, while the in-band impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. In addition, with the help of reduced gain design, near band blocker gain is minimized, further improving the blocker resilience. The receiver is designed for configurable operation from 0.7–2.7 GHz and a baseband bandwidth of 10 MHz. Simulated in a 28 nm technology, the DDSR demonstrates a maximum noise figure of 6.2 dB, and achieves a peak SNDR of 53 dB with an out-of-band 1 dB input compression point of
-
11
dBm at a 100 MHz offset.</description><identifier>ISSN: 0925-1030</identifier><identifier>EISSN: 1573-1979</identifier><identifier>DOI: 10.1007/s10470-020-01611-2</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>Attenuation ; Bandwidths ; Broadband ; Circuits and Systems ; Electrical Engineering ; Engineering ; Impedance ; Impedance matching ; Input impedance ; Noise levels ; Positive feedback ; Signal,Image and Speech Processing</subject><ispartof>Analog integrated circuits and signal processing, 2020-04, Vol.103 (1), p.195-207</ispartof><rights>The Author(s) 2020</rights><rights>The Author(s) 2020. This work is published under http://creativecommons.org/licenses/by/4.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c314t-116a3c0958c63a01165dd2907013fdd7902f7820b2b0092d64303306c364eba3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s10470-020-01611-2$$EPDF$$P50$$Gspringer$$Hfree_for_read</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/s10470-020-01611-2$$EHTML$$P50$$Gspringer$$Hfree_for_read</linktohtml><link.rule.ids>314,780,784,27922,27923,41486,42555,51317</link.rule.ids></links><search><creatorcontrib>Ul Haq, Faizan</creatorcontrib><creatorcontrib>Englund, Mikko</creatorcontrib><creatorcontrib>Östman, Kim B.</creatorcontrib><creatorcontrib>Stadius, Kari</creatorcontrib><creatorcontrib>Kosunen, Marko</creatorcontrib><creatorcontrib>Koli, Kimmo</creatorcontrib><creatorcontrib>Ryynänen, Jussi</creatorcontrib><title>A wideband blocker-resilient direct delta sigma receiver with selective input-impedance matching</title><title>Analog integrated circuits and signal processing</title><addtitle>Analog Integr Circ Sig Process</addtitle><description>This paper presents a wideband blocker-tolerant direct
Δ
Σ
receiver (DDSR). Blockers are attenuated through selective input impedance matching and reduced gain design. The selective input impedance profile provides a low impedance at blocker frequencies enabling blocker attenuation, while the in-band impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. In addition, with the help of reduced gain design, near band blocker gain is minimized, further improving the blocker resilience. The receiver is designed for configurable operation from 0.7–2.7 GHz and a baseband bandwidth of 10 MHz. Simulated in a 28 nm technology, the DDSR demonstrates a maximum noise figure of 6.2 dB, and achieves a peak SNDR of 53 dB with an out-of-band 1 dB input compression point of
-
11
dBm at a 100 MHz offset.</description><subject>Attenuation</subject><subject>Bandwidths</subject><subject>Broadband</subject><subject>Circuits and Systems</subject><subject>Electrical Engineering</subject><subject>Engineering</subject><subject>Impedance</subject><subject>Impedance matching</subject><subject>Input impedance</subject><subject>Noise levels</subject><subject>Positive feedback</subject><subject>Signal,Image and Speech Processing</subject><issn>0925-1030</issn><issn>1573-1979</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>C6C</sourceid><recordid>eNp9UMtOwzAQtBBIlMIPcLLE2bC2kzg5VhUvCYlL78axN61LXtgpiL_HECRuHFajXc3M7g4hlxyuOYC6iRwyBQxEKl5wzsQRWfBcScYrVR2TBVQiZxwknJKzGPcAIFQGC_Kyoh_eYW16R-t2sK8YWMDoW4_9RJ0PaBNgOxka_bYzNA3Qv2NIsmlHI7aJkHrq-_EwMd-N6ExvkXZmsjvfb8_JSWPaiBe_uCSbu9vN-oE9Pd8_rldPzEqeTYzzwkgLVV7aQhpIbe6cqEABl41zqgLRqFJALWpIv7gikyAlFFYWWbpeLsnVbDuG4e2AcdL74RD6tFELWZaSl5nKEkvMLBuGGAM2egy-M-FTc9DfQeo5SJ2C1D9BJvWSyFkUE7nfYviz_kf1BYSFdWc</recordid><startdate>20200401</startdate><enddate>20200401</enddate><creator>Ul Haq, Faizan</creator><creator>Englund, Mikko</creator><creator>Östman, Kim B.</creator><creator>Stadius, Kari</creator><creator>Kosunen, Marko</creator><creator>Koli, Kimmo</creator><creator>Ryynänen, Jussi</creator><general>Springer US</general><general>Springer Nature B.V</general><scope>C6C</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TG</scope><scope>8FD</scope><scope>KL.</scope><scope>L7M</scope></search><sort><creationdate>20200401</creationdate><title>A wideband blocker-resilient direct delta sigma receiver with selective input-impedance matching</title><author>Ul Haq, Faizan ; Englund, Mikko ; Östman, Kim B. ; Stadius, Kari ; Kosunen, Marko ; Koli, Kimmo ; Ryynänen, Jussi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c314t-116a3c0958c63a01165dd2907013fdd7902f7820b2b0092d64303306c364eba3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Attenuation</topic><topic>Bandwidths</topic><topic>Broadband</topic><topic>Circuits and Systems</topic><topic>Electrical Engineering</topic><topic>Engineering</topic><topic>Impedance</topic><topic>Impedance matching</topic><topic>Input impedance</topic><topic>Noise levels</topic><topic>Positive feedback</topic><topic>Signal,Image and Speech Processing</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ul Haq, Faizan</creatorcontrib><creatorcontrib>Englund, Mikko</creatorcontrib><creatorcontrib>Östman, Kim B.</creatorcontrib><creatorcontrib>Stadius, Kari</creatorcontrib><creatorcontrib>Kosunen, Marko</creatorcontrib><creatorcontrib>Koli, Kimmo</creatorcontrib><creatorcontrib>Ryynänen, Jussi</creatorcontrib><collection>Springer Nature OA Free Journals</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Meteorological & Geoastrophysical Abstracts</collection><collection>Technology Research Database</collection><collection>Meteorological & Geoastrophysical Abstracts - Academic</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Analog integrated circuits and signal processing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Ul Haq, Faizan</au><au>Englund, Mikko</au><au>Östman, Kim B.</au><au>Stadius, Kari</au><au>Kosunen, Marko</au><au>Koli, Kimmo</au><au>Ryynänen, Jussi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A wideband blocker-resilient direct delta sigma receiver with selective input-impedance matching</atitle><jtitle>Analog integrated circuits and signal processing</jtitle><stitle>Analog Integr Circ Sig Process</stitle><date>2020-04-01</date><risdate>2020</risdate><volume>103</volume><issue>1</issue><spage>195</spage><epage>207</epage><pages>195-207</pages><issn>0925-1030</issn><eissn>1573-1979</eissn><abstract>This paper presents a wideband blocker-tolerant direct
Δ
Σ
receiver (DDSR). Blockers are attenuated through selective input impedance matching and reduced gain design. The selective input impedance profile provides a low impedance at blocker frequencies enabling blocker attenuation, while the in-band impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. In addition, with the help of reduced gain design, near band blocker gain is minimized, further improving the blocker resilience. The receiver is designed for configurable operation from 0.7–2.7 GHz and a baseband bandwidth of 10 MHz. Simulated in a 28 nm technology, the DDSR demonstrates a maximum noise figure of 6.2 dB, and achieves a peak SNDR of 53 dB with an out-of-band 1 dB input compression point of
-
11
dBm at a 100 MHz offset.</abstract><cop>New York</cop><pub>Springer US</pub><doi>10.1007/s10470-020-01611-2</doi><tpages>13</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Attenuation Bandwidths Broadband Circuits and Systems Electrical Engineering Engineering Impedance Impedance matching Input impedance Noise levels Positive feedback Signal,Image and Speech Processing |
title | A wideband blocker-resilient direct delta sigma receiver with selective input-impedance matching |
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