A Highly Linear OTA-Less 1-1 MASH VCO-Based [Formula Omitted] ADC With an Efficient Phase Quantization Noise Extraction Technique
In this article, an efficient technique is introduced to extract the quantization noise of a multi-phase voltage-controlled oscillator (VCO)-based quantizer (VCOQ) in the time domain as a pulsewidth modulated (PWM) signal. Using this technique, a new highly linear VCO-based 1-1 multi-stage noise sha...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2020-01, Vol.55 (3), p.706 |
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creator | Maghami, Hamidreza Payandehnia, Pedram Mirzaie, Hossein Zanbaghi, Ramin Zareie, Hossein Goins, Justin Dey, Siladitya Mayaram, Kartikeya Fiez, Terri S |
description | In this article, an efficient technique is introduced to extract the quantization noise of a multi-phase voltage-controlled oscillator (VCO)-based quantizer (VCOQ) in the time domain as a pulsewidth modulated (PWM) signal. Using this technique, a new highly linear VCO-based 1-1 multi-stage noise shaping (MASH) delta–sigma analog-to-digital converter (ADC) structure is presented. This architecture does not require any operational transconductance amplifier (OTA)-based analog integrators or power-hungry linearization methods. The first stage is a closed-loop multi-phase VCO-based voltage-to-phase (V-to-P) converter, and the second stage is an open-loop multi-phase VCO-based voltage-to-frequency (V-to-F) converter. Using the proposed technique, the phase quantization error of the first stage is extracted as a pulse signal and then fed to the second stage. The input of the first VCO is a very small amplitude signal, and the input of the second VCO is a two-level PWM signal. Therefore, the VCO non-linearity does not limit the overall ADC performance, mitigating the need for power-hungry linearization methods. The prototype achieves second-order noise shaping with a DR/SFDR/SNR/SNDR of 82.7/88.7/80.3/79.7 dB for an input signal BW of 2 MHz. The fabricated design consumes 1.248 mW from a 0.9-V supply. |
doi_str_mv | 10.1109/JSSC.2019.2954764 |
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Using this technique, a new highly linear VCO-based 1-1 multi-stage noise shaping (MASH) delta–sigma analog-to-digital converter (ADC) structure is presented. This architecture does not require any operational transconductance amplifier (OTA)-based analog integrators or power-hungry linearization methods. The first stage is a closed-loop multi-phase VCO-based voltage-to-phase (V-to-P) converter, and the second stage is an open-loop multi-phase VCO-based voltage-to-frequency (V-to-F) converter. Using the proposed technique, the phase quantization error of the first stage is extracted as a pulse signal and then fed to the second stage. The input of the first VCO is a very small amplitude signal, and the input of the second VCO is a two-level PWM signal. Therefore, the VCO non-linearity does not limit the overall ADC performance, mitigating the need for power-hungry linearization methods. The prototype achieves second-order noise shaping with a DR/SFDR/SNR/SNDR of 82.7/88.7/80.3/79.7 dB for an input signal BW of 2 MHz. The fabricated design consumes 1.248 mW from a 0.9-V supply.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2019.2954764</identifier><language>eng</language><publisher>New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</publisher><subject>Analog to digital conversion ; Analog to digital converters ; Direct reduction ; Integrators ; Linearity ; Linearization ; Measurement ; Multiphase ; Noise ; Operational amplifiers ; Transconductance ; Voltage controlled oscillators</subject><ispartof>IEEE journal of solid-state circuits, 2020-01, Vol.55 (3), p.706</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Maghami, Hamidreza</creatorcontrib><creatorcontrib>Payandehnia, Pedram</creatorcontrib><creatorcontrib>Mirzaie, Hossein</creatorcontrib><creatorcontrib>Zanbaghi, Ramin</creatorcontrib><creatorcontrib>Zareie, Hossein</creatorcontrib><creatorcontrib>Goins, Justin</creatorcontrib><creatorcontrib>Dey, Siladitya</creatorcontrib><creatorcontrib>Mayaram, Kartikeya</creatorcontrib><creatorcontrib>Fiez, Terri S</creatorcontrib><title>A Highly Linear OTA-Less 1-1 MASH VCO-Based [Formula Omitted] ADC With an Efficient Phase Quantization Noise Extraction Technique</title><title>IEEE journal of solid-state circuits</title><description>In this article, an efficient technique is introduced to extract the quantization noise of a multi-phase voltage-controlled oscillator (VCO)-based quantizer (VCOQ) in the time domain as a pulsewidth modulated (PWM) signal. Using this technique, a new highly linear VCO-based 1-1 multi-stage noise shaping (MASH) delta–sigma analog-to-digital converter (ADC) structure is presented. This architecture does not require any operational transconductance amplifier (OTA)-based analog integrators or power-hungry linearization methods. The first stage is a closed-loop multi-phase VCO-based voltage-to-phase (V-to-P) converter, and the second stage is an open-loop multi-phase VCO-based voltage-to-frequency (V-to-F) converter. Using the proposed technique, the phase quantization error of the first stage is extracted as a pulse signal and then fed to the second stage. The input of the first VCO is a very small amplitude signal, and the input of the second VCO is a two-level PWM signal. Therefore, the VCO non-linearity does not limit the overall ADC performance, mitigating the need for power-hungry linearization methods. The prototype achieves second-order noise shaping with a DR/SFDR/SNR/SNDR of 82.7/88.7/80.3/79.7 dB for an input signal BW of 2 MHz. The fabricated design consumes 1.248 mW from a 0.9-V supply.</description><subject>Analog to digital conversion</subject><subject>Analog to digital converters</subject><subject>Direct reduction</subject><subject>Integrators</subject><subject>Linearity</subject><subject>Linearization</subject><subject>Measurement</subject><subject>Multiphase</subject><subject>Noise</subject><subject>Operational amplifiers</subject><subject>Transconductance</subject><subject>Voltage controlled oscillators</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><recordid>eNqNitFKwzAYRoMoWKcP4N0PXqfmb9Otvay1o8hmlRYVREboUpvRJdqkoN755hbxAbz6-M45hJwj8xFZcnlTVZkfMEz8IIn4Ys4PiIdRFFNchE-HxGMMY5oEjB2TE2t30-U8Ro98p1Co167_hJXSUgxQ1ildSWsBKcI6rQp4yEp6JazcwvPSDPuxF1DulXNy-wLpdQaPynUgNORtqxoltYO7bsrhfhTaqS_hlNFwa9SE8g83iOYX1LLptHof5Sk5akVv5dnfzsjFMq-zgr4NZtLWbXZmHPSkNkE4j5GzkMfh_6ofBA5UeA</recordid><startdate>20200101</startdate><enddate>20200101</enddate><creator>Maghami, Hamidreza</creator><creator>Payandehnia, Pedram</creator><creator>Mirzaie, Hossein</creator><creator>Zanbaghi, Ramin</creator><creator>Zareie, Hossein</creator><creator>Goins, Justin</creator><creator>Dey, Siladitya</creator><creator>Mayaram, Kartikeya</creator><creator>Fiez, Terri S</creator><general>The Institute of Electrical and Electronics Engineers, Inc. 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Using this technique, a new highly linear VCO-based 1-1 multi-stage noise shaping (MASH) delta–sigma analog-to-digital converter (ADC) structure is presented. This architecture does not require any operational transconductance amplifier (OTA)-based analog integrators or power-hungry linearization methods. The first stage is a closed-loop multi-phase VCO-based voltage-to-phase (V-to-P) converter, and the second stage is an open-loop multi-phase VCO-based voltage-to-frequency (V-to-F) converter. Using the proposed technique, the phase quantization error of the first stage is extracted as a pulse signal and then fed to the second stage. The input of the first VCO is a very small amplitude signal, and the input of the second VCO is a two-level PWM signal. Therefore, the VCO non-linearity does not limit the overall ADC performance, mitigating the need for power-hungry linearization methods. The prototype achieves second-order noise shaping with a DR/SFDR/SNR/SNDR of 82.7/88.7/80.3/79.7 dB for an input signal BW of 2 MHz. The fabricated design consumes 1.248 mW from a 0.9-V supply.</abstract><cop>New York</cop><pub>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</pub><doi>10.1109/JSSC.2019.2954764</doi></addata></record> |
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subjects | Analog to digital conversion Analog to digital converters Direct reduction Integrators Linearity Linearization Measurement Multiphase Noise Operational amplifiers Transconductance Voltage controlled oscillators |
title | A Highly Linear OTA-Less 1-1 MASH VCO-Based [Formula Omitted] ADC With an Efficient Phase Quantization Noise Extraction Technique |
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