A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter

The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimension...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on power electronics 2020-04, Vol.35 (4), p.3506-3518
Hauptverfasser: Lin, Hongjian, Shu, Zeliang, Yao, Jiaxuan, Yan, Han, Zhu, Leilei, Luo, Deng, He, Xiaoqiong
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 3518
container_issue 4
container_start_page 3506
container_title IEEE transactions on power electronics
container_volume 35
creator Lin, Hongjian
Shu, Zeliang
Yao, Jiaxuan
Yan, Han
Zhu, Leilei
Luo, Deng
He, Xiaoqiong
description The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.
doi_str_mv 10.1109/TPEL.2019.2938606
format Article
fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_2338663090</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>8821402</ieee_id><sourcerecordid>2338663090</sourcerecordid><originalsourceid>FETCH-LOGICAL-c293t-b0941c82021f0390bfc3f1a48095fdb8e394000af4f48ebd181ad9758aef88643</originalsourceid><addsrcrecordid>eNo9kF9rwjAUxcPYYM7tA4y9BPZcd9OkNXl0nfsD1Qk6fSxpm2iktl0aBb_9IsqeLvdyzrmcH0KPBAaEgHhZzMbpIAQiBqGgPIb4CvWIYCQAAsNr1APOo4ALQW_RXddtAQiLgPSQG-G52bWV0UaVmAZveJpOglfZ-W2-nK0meKGKTW1-9wqvjNvgZVM5uVZeUsm6MPUaJ7KVuamMO2LdWEzT6Szxx66QpQ-Z7CtnKnVQFU6a-qCsU_Ye3WhZderhMvvo5328SD6D9PvjKxmlQeFLuCAHX6DgIYREAxWQ64JqIhkHEeky54oKBgBSM824ykvCiSzFMOJSac5jRvvo-Zzb2sYX6Fy2bfa29i-zkHpKMQUBXkXOqsI2XWeVzlprdtIeMwLZCW52gpud4GYXuN7zdPYYpdS_nvOQMAjpH2ZPc_w</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2338663090</pqid></control><display><type>article</type><title>A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter</title><source>IEEE Electronic Library (IEL)</source><creator>Lin, Hongjian ; Shu, Zeliang ; Yao, Jiaxuan ; Yan, Han ; Zhu, Leilei ; Luo, Deng ; He, Xiaoqiong</creator><creatorcontrib>Lin, Hongjian ; Shu, Zeliang ; Yao, Jiaxuan ; Yan, Han ; Zhu, Leilei ; Luo, Deng ; He, Xiaoqiong</creatorcontrib><description>The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.</description><identifier>ISSN: 0885-8993</identifier><identifier>EISSN: 1941-0107</identifier><identifier>DOI: 10.1109/TPEL.2019.2938606</identifier><identifier>CODEN: ITPEE8</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) ; Algorithms ; Balancing ; Capacitors ; Computer simulation ; Converters ; Coordinates ; Degrees of freedom ; Electric potential ; Modulation ; Multilevel converters ; Occupancy ; optimized voltage-balancing capability ; Real-time systems ; simplified digital implementation ; Space vector pulse width modulation ; Switches ; Switching sequences ; Three-dimensional space vector pulsewidth modulation (SVPWM) ; Voltage</subject><ispartof>IEEE transactions on power electronics, 2020-04, Vol.35 (4), p.3506-3518</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-b0941c82021f0390bfc3f1a48095fdb8e394000af4f48ebd181ad9758aef88643</citedby><cites>FETCH-LOGICAL-c293t-b0941c82021f0390bfc3f1a48095fdb8e394000af4f48ebd181ad9758aef88643</cites><orcidid>0000-0002-4142-6361 ; 0000-0001-5662-3416</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8821402$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8821402$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lin, Hongjian</creatorcontrib><creatorcontrib>Shu, Zeliang</creatorcontrib><creatorcontrib>Yao, Jiaxuan</creatorcontrib><creatorcontrib>Yan, Han</creatorcontrib><creatorcontrib>Zhu, Leilei</creatorcontrib><creatorcontrib>Luo, Deng</creatorcontrib><creatorcontrib>He, Xiaoqiong</creatorcontrib><title>A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter</title><title>IEEE transactions on power electronics</title><addtitle>TPEL</addtitle><description>The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.</description><subject>3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC)</subject><subject>Algorithms</subject><subject>Balancing</subject><subject>Capacitors</subject><subject>Computer simulation</subject><subject>Converters</subject><subject>Coordinates</subject><subject>Degrees of freedom</subject><subject>Electric potential</subject><subject>Modulation</subject><subject>Multilevel converters</subject><subject>Occupancy</subject><subject>optimized voltage-balancing capability</subject><subject>Real-time systems</subject><subject>simplified digital implementation</subject><subject>Space vector pulse width modulation</subject><subject>Switches</subject><subject>Switching sequences</subject><subject>Three-dimensional space vector pulsewidth modulation (SVPWM)</subject><subject>Voltage</subject><issn>0885-8993</issn><issn>1941-0107</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kF9rwjAUxcPYYM7tA4y9BPZcd9OkNXl0nfsD1Qk6fSxpm2iktl0aBb_9IsqeLvdyzrmcH0KPBAaEgHhZzMbpIAQiBqGgPIb4CvWIYCQAAsNr1APOo4ALQW_RXddtAQiLgPSQG-G52bWV0UaVmAZveJpOglfZ-W2-nK0meKGKTW1-9wqvjNvgZVM5uVZeUsm6MPUaJ7KVuamMO2LdWEzT6Szxx66QpQ-Z7CtnKnVQFU6a-qCsU_Ye3WhZderhMvvo5328SD6D9PvjKxmlQeFLuCAHX6DgIYREAxWQ64JqIhkHEeky54oKBgBSM824ykvCiSzFMOJSac5jRvvo-Zzb2sYX6Fy2bfa29i-zkHpKMQUBXkXOqsI2XWeVzlprdtIeMwLZCW52gpud4GYXuN7zdPYYpdS_nvOQMAjpH2ZPc_w</recordid><startdate>20200401</startdate><enddate>20200401</enddate><creator>Lin, Hongjian</creator><creator>Shu, Zeliang</creator><creator>Yao, Jiaxuan</creator><creator>Yan, Han</creator><creator>Zhu, Leilei</creator><creator>Luo, Deng</creator><creator>He, Xiaoqiong</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>FR3</scope><scope>JQ2</scope><scope>KR7</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-4142-6361</orcidid><orcidid>https://orcid.org/0000-0001-5662-3416</orcidid></search><sort><creationdate>20200401</creationdate><title>A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter</title><author>Lin, Hongjian ; Shu, Zeliang ; Yao, Jiaxuan ; Yan, Han ; Zhu, Leilei ; Luo, Deng ; He, Xiaoqiong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c293t-b0941c82021f0390bfc3f1a48095fdb8e394000af4f48ebd181ad9758aef88643</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC)</topic><topic>Algorithms</topic><topic>Balancing</topic><topic>Capacitors</topic><topic>Computer simulation</topic><topic>Converters</topic><topic>Coordinates</topic><topic>Degrees of freedom</topic><topic>Electric potential</topic><topic>Modulation</topic><topic>Multilevel converters</topic><topic>Occupancy</topic><topic>optimized voltage-balancing capability</topic><topic>Real-time systems</topic><topic>simplified digital implementation</topic><topic>Space vector pulse width modulation</topic><topic>Switches</topic><topic>Switching sequences</topic><topic>Three-dimensional space vector pulsewidth modulation (SVPWM)</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lin, Hongjian</creatorcontrib><creatorcontrib>Shu, Zeliang</creatorcontrib><creatorcontrib>Yao, Jiaxuan</creatorcontrib><creatorcontrib>Yan, Han</creatorcontrib><creatorcontrib>Zhu, Leilei</creatorcontrib><creatorcontrib>Luo, Deng</creatorcontrib><creatorcontrib>He, Xiaoqiong</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Mechanical &amp; Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on power electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lin, Hongjian</au><au>Shu, Zeliang</au><au>Yao, Jiaxuan</au><au>Yan, Han</au><au>Zhu, Leilei</au><au>Luo, Deng</au><au>He, Xiaoqiong</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter</atitle><jtitle>IEEE transactions on power electronics</jtitle><stitle>TPEL</stitle><date>2020-04-01</date><risdate>2020</risdate><volume>35</volume><issue>4</issue><spage>3506</spage><epage>3518</epage><pages>3506-3518</pages><issn>0885-8993</issn><eissn>1941-0107</eissn><coden>ITPEE8</coden><abstract>The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TPEL.2019.2938606</doi><tpages>13</tpages><orcidid>https://orcid.org/0000-0002-4142-6361</orcidid><orcidid>https://orcid.org/0000-0001-5662-3416</orcidid></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0885-8993
ispartof IEEE transactions on power electronics, 2020-04, Vol.35 (4), p.3506-3518
issn 0885-8993
1941-0107
language eng
recordid cdi_proquest_journals_2338663090
source IEEE Electronic Library (IEL)
subjects 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC)
Algorithms
Balancing
Capacitors
Computer simulation
Converters
Coordinates
Degrees of freedom
Electric potential
Modulation
Multilevel converters
Occupancy
optimized voltage-balancing capability
Real-time systems
simplified digital implementation
Space vector pulse width modulation
Switches
Switching sequences
Three-dimensional space vector pulsewidth modulation (SVPWM)
Voltage
title A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T00%3A07%3A47IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Simplified%203-D%20NLM-Based%20SVPWM%20Technique%20With%20Voltage-Balancing%20Capability%20for%203LNPC%20Cascaded%20Multilevel%20Converter&rft.jtitle=IEEE%20transactions%20on%20power%20electronics&rft.au=Lin,%20Hongjian&rft.date=2020-04-01&rft.volume=35&rft.issue=4&rft.spage=3506&rft.epage=3518&rft.pages=3506-3518&rft.issn=0885-8993&rft.eissn=1941-0107&rft.coden=ITPEE8&rft_id=info:doi/10.1109/TPEL.2019.2938606&rft_dat=%3Cproquest_RIE%3E2338663090%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2338663090&rft_id=info:pmid/&rft_ieee_id=8821402&rfr_iscdi=true