A new hybrid flying capacitor–based single‐phase nine‐level inverter
Multilevel inverters (MLIs) with reduced part count are becoming popular in the arena of medium voltage and medium power applications. This proposed topology owns the advantages of reduced number and voltage stress across the switching devices and higher efficiency. It also combines the method of ut...
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| Veröffentlicht in: | International transactions on electrical energy systems 2019-12, Vol.29 (12), p.n/a |
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| container_title | International transactions on electrical energy systems |
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| creator | Tirupathi, Abhilash Annamalai, Kirubakaran Veeramraju Tirumala, Somasekhar |
| description | Multilevel inverters (MLIs) with reduced part count are becoming popular in the arena of medium voltage and medium power applications. This proposed topology owns the advantages of reduced number and voltage stress across the switching devices and higher efficiency. It also combines the method of utilizing full DC‐link voltage to improve the RMS output voltage. The proposed hybrid topology is constructed using three different sections consisting of a cascaded two two‐level inverter, H‐bridge with a flying capacitor, and single‐leg low‐frequency circuit. The complete modes of operation to generate 9‐level A. C voltage at the inverter output including the FC voltage balancing has been comprehensively presented. A comparison is constructed with the proposed and recent topologies in the literature to show the merits of the proposed configuration. The proposed topology is tested in MATLAB/SIMULINK environment and a scale‐down prototype has been developed in the laboratory. The feasibility of the proposed topology is verified through simulation and experimental results. |
| doi_str_mv | 10.1002/2050-7038.12139 |
| format | Article |
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This proposed topology owns the advantages of reduced number and voltage stress across the switching devices and higher efficiency. It also combines the method of utilizing full DC‐link voltage to improve the RMS output voltage. The proposed hybrid topology is constructed using three different sections consisting of a cascaded two two‐level inverter, H‐bridge with a flying capacitor, and single‐leg low‐frequency circuit. The complete modes of operation to generate 9‐level A. C voltage at the inverter output including the FC voltage balancing has been comprehensively presented. A comparison is constructed with the proposed and recent topologies in the literature to show the merits of the proposed configuration. The proposed topology is tested in MATLAB/SIMULINK environment and a scale‐down prototype has been developed in the laboratory. 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The feasibility of the proposed topology is verified through simulation and experimental results.</description><subject>Capacitors</subject><subject>Circuits</subject><subject>efficiency</subject><subject>Electric potential</subject><subject>Inverters</subject><subject>multilevel inverter</subject><subject>pulse width modulation</subject><subject>Topology</subject><subject>total harmonic distortion</subject><subject>Voltage</subject><issn>2050-7038</issn><issn>2050-7038</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><recordid>eNqFUMtOwzAQtBBIVKVnrpY4p_XaaR0fq6q8VAkO5Wy5yZq6Ckmw-1Bu_QQk_rBfQkIQ4sZedmY0sysNIdfAhsAYH3E2ZpFkIhkCB6HOSO9XOf-DL8kghA1rRsUAMumRxykt8EDX9cq7jNq8dsUrTU1lUrct_en4uTIBMxoaOcfT8aNaN5wWrmhJjnvMqSv26Lfor8iFNXnAwc_uk5fb-XJ2Hy2e7h5m00WUirFUkY0ZpHxiBEqrIOYIgkvLjUotWpZk4xXPmARpoYEgTaYwzpQygttMQhqLPrnp7la-fN9h2OpNufNF81JzwZkSIBLVuEadK_VlCB6trrx7M77WwHTbmW5b0W0r-ruzJjHpEgeXY_2fXc-X8-cu-AWOXHBW</recordid><startdate>201912</startdate><enddate>201912</enddate><creator>Tirupathi, Abhilash</creator><creator>Annamalai, Kirubakaran</creator><creator>Veeramraju Tirumala, Somasekhar</creator><general>Hindawi Limited</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>FR3</scope><scope>H8D</scope><scope>KR7</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-7555-425X</orcidid><orcidid>https://orcid.org/0000-0002-3800-1776</orcidid></search><sort><creationdate>201912</creationdate><title>A new hybrid flying capacitor–based single‐phase nine‐level inverter</title><author>Tirupathi, Abhilash ; Annamalai, Kirubakaran ; Veeramraju Tirumala, Somasekhar</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c3579-f401c26a3e7f9142e1327f2a9cfef08d5b2d0717f1d5b17ad9e4d99a32fd71c43</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>Capacitors</topic><topic>Circuits</topic><topic>efficiency</topic><topic>Electric potential</topic><topic>Inverters</topic><topic>multilevel inverter</topic><topic>pulse width modulation</topic><topic>Topology</topic><topic>total harmonic distortion</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tirupathi, Abhilash</creatorcontrib><creatorcontrib>Annamalai, Kirubakaran</creatorcontrib><creatorcontrib>Veeramraju Tirumala, Somasekhar</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>Aerospace Database</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>International transactions on electrical energy systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Tirupathi, Abhilash</au><au>Annamalai, Kirubakaran</au><au>Veeramraju Tirumala, Somasekhar</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A new hybrid flying capacitor–based single‐phase nine‐level inverter</atitle><jtitle>International transactions on electrical energy systems</jtitle><date>2019-12</date><risdate>2019</risdate><volume>29</volume><issue>12</issue><epage>n/a</epage><issn>2050-7038</issn><eissn>2050-7038</eissn><abstract>Multilevel inverters (MLIs) with reduced part count are becoming popular in the arena of medium voltage and medium power applications. This proposed topology owns the advantages of reduced number and voltage stress across the switching devices and higher efficiency. It also combines the method of utilizing full DC‐link voltage to improve the RMS output voltage. The proposed hybrid topology is constructed using three different sections consisting of a cascaded two two‐level inverter, H‐bridge with a flying capacitor, and single‐leg low‐frequency circuit. The complete modes of operation to generate 9‐level A. C voltage at the inverter output including the FC voltage balancing has been comprehensively presented. A comparison is constructed with the proposed and recent topologies in the literature to show the merits of the proposed configuration. The proposed topology is tested in MATLAB/SIMULINK environment and a scale‐down prototype has been developed in the laboratory. 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| language | eng |
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| source | Wiley Online Library All Journals |
| subjects | Capacitors Circuits efficiency Electric potential Inverters multilevel inverter pulse width modulation Topology total harmonic distortion Voltage |
| title | A new hybrid flying capacitor–based single‐phase nine‐level inverter |
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