Impact of Layer Configuration and Doping on Electron Transport and Bias Stability in Heterojunction and Superlattice Metal Oxide Transistors

The astonishing recent progress in the field of metal oxide thin‐film transistors (TFTs) and their debut in commercial displays is accomplished using vacuum‐processed multicomponent oxide semiconductors. However, emulating this success with their solution‐processable counterparts poses numerous scientific challenges. Here, the development of high mobility n‐channel TFTs based on ultrathin (108) with nearly zero onset voltages and hysteresis‐free operation despite the low temperature processing (≤200 °C). The enhanced performance is attributed to the formation of a quasi‐2D electron gas‐like system at the In2O3/ZnO heterointerface due to the conduction band offset. It is shown that altering the oxide deposition sequence has an adverse effect on electron transport due to formation of trap states. Optimized multilayer TFTs are shown to exhibit improved bias‐stress stability compared to single‐layer TFTs. Modulating the electron concentration within the superlattice channel via selective n‐doping of the ZnO interlayers leads to almost 100% saturation mobility increase (≈25 cm2 V−1 s−1) even when the TFTs are fabricated on flexible plastic substrates. Solution‐processed heterojunction and superlattice channel transistors composed of sequentially deposited In2O3 and ZnO layers show remarkably different operating characteristics depending on the stack configuration. The difference relates to the quality of the heterointerface and its dependence on the material deposition sequence. Optimized superlattice transistors fabricated on plastic substrates operate at ±1.5 V with a maximum electron mobility of 25 cm2 V‐1 s‐1.