Fabrication of Sub-10 nm Metal Wire Circuits using Directed Self-Assembly of Block Copolymers
A novel half-pitch (HP) 10 nm physical-epitaxial frequency multiplication process using a high chi (χ) lamellar block copolymer was developed to carry out process verification of directed self-assembly lithography on a 300 mm wafer for practical semiconductor device manufacturing. Electrically open...
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| Veröffentlicht in: | Journal of Photopolymer Science and Technology 2016/06/21, Vol.29(5), pp.647-652 |
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| creator | Azuma, Tsukasa Seino, Yuriko Sato, Hironobu Kasahara, Yusuke Kobayashi, Katsutoshi Kubota, Hitoshi Kanai, Hideki Kodera, Katsuyoshi Kihara, Naoko Kawamonzen, Yoshiaki Minegishi, Shinya Miyagi, Ken Yamano, Hitoshi Tobana, Toshikatsu Shiraishi, Masayuki Nomura, Satoshi |
| description | A novel half-pitch (HP) 10 nm physical-epitaxial frequency multiplication process using a high chi (χ) lamellar block copolymer was developed to carry out process verification of directed self-assembly lithography on a 300 mm wafer for practical semiconductor device manufacturing. Electrically open and short process level-test element group (PL-TEG) yield verification of sub-10 nm metal wire circuits fabricated using the HP 10 nm physical-epitaxial frequency multiplication process was carried out on a 300 mm wafer. The electrically open and short PL-TEG yield verification revealed the viability of the HP 10 nm physical-epitaxial frequency multiplication process from the perspective of the total practical performance including critical dimension control, defect control, pattern placement error, space width roughness, space edge roughness, and process windows in the pattern transfer process. |
| doi_str_mv | 10.2494/photopolymer.29.647 |
| format | Article |
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Electrically open and short process level-test element group (PL-TEG) yield verification of sub-10 nm metal wire circuits fabricated using the HP 10 nm physical-epitaxial frequency multiplication process was carried out on a 300 mm wafer. The electrically open and short PL-TEG yield verification revealed the viability of the HP 10 nm physical-epitaxial frequency multiplication process from the perspective of the total practical performance including critical dimension control, defect control, pattern placement error, space width roughness, space edge roughness, and process windows in the pattern transfer process.</description><identifier>ISSN: 0914-9244</identifier><identifier>EISSN: 1349-6336</identifier><identifier>DOI: 10.2494/photopolymer.29.647</identifier><language>eng</language><publisher>Hiratsuka: The Society of Photopolymer Science and Technology(SPST)</publisher><subject>block copolymer ; Block copolymers ; Circuits ; directed self-assembly ; Electric wire ; Epitaxy ; lithography ; metal wire circuit ; Multiplication ; Roughness ; Self-assembly ; sub-10 nm ; Viability ; Wire</subject><ispartof>Journal of Photopolymer Science and Technology, 2016/06/21, Vol.29(5), pp.647-652</ispartof><rights>2016 The Society of Photopolymer Science and Technology (SPST)</rights><rights>Copyright Japan Science and Technology Agency 2016</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c535t-6ff32b2fa11229458dbc2d0237384fdb034d177f03d5a3dd6e70bb4a5f24b03e3</citedby><cites>FETCH-LOGICAL-c535t-6ff32b2fa11229458dbc2d0237384fdb034d177f03d5a3dd6e70bb4a5f24b03e3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,1877,27901,27902</link.rule.ids></links><search><creatorcontrib>Azuma, Tsukasa</creatorcontrib><creatorcontrib>Seino, Yuriko</creatorcontrib><creatorcontrib>Sato, Hironobu</creatorcontrib><creatorcontrib>Kasahara, Yusuke</creatorcontrib><creatorcontrib>Kobayashi, Katsutoshi</creatorcontrib><creatorcontrib>Kubota, Hitoshi</creatorcontrib><creatorcontrib>Kanai, Hideki</creatorcontrib><creatorcontrib>Kodera, Katsuyoshi</creatorcontrib><creatorcontrib>Kihara, Naoko</creatorcontrib><creatorcontrib>Kawamonzen, Yoshiaki</creatorcontrib><creatorcontrib>Minegishi, Shinya</creatorcontrib><creatorcontrib>Miyagi, Ken</creatorcontrib><creatorcontrib>Yamano, Hitoshi</creatorcontrib><creatorcontrib>Tobana, Toshikatsu</creatorcontrib><creatorcontrib>Shiraishi, Masayuki</creatorcontrib><creatorcontrib>Nomura, Satoshi</creatorcontrib><title>Fabrication of Sub-10 nm Metal Wire Circuits using Directed Self-Assembly of Block Copolymers</title><title>Journal of Photopolymer Science and Technology</title><addtitle>J. Photopol. Sci. Technol.</addtitle><description>A novel half-pitch (HP) 10 nm physical-epitaxial frequency multiplication process using a high chi (χ) lamellar block copolymer was developed to carry out process verification of directed self-assembly lithography on a 300 mm wafer for practical semiconductor device manufacturing. Electrically open and short process level-test element group (PL-TEG) yield verification of sub-10 nm metal wire circuits fabricated using the HP 10 nm physical-epitaxial frequency multiplication process was carried out on a 300 mm wafer. The electrically open and short PL-TEG yield verification revealed the viability of the HP 10 nm physical-epitaxial frequency multiplication process from the perspective of the total practical performance including critical dimension control, defect control, pattern placement error, space width roughness, space edge roughness, and process windows in the pattern transfer process.</description><subject>block copolymer</subject><subject>Block copolymers</subject><subject>Circuits</subject><subject>directed self-assembly</subject><subject>Electric wire</subject><subject>Epitaxy</subject><subject>lithography</subject><subject>metal wire circuit</subject><subject>Multiplication</subject><subject>Roughness</subject><subject>Self-assembly</subject><subject>sub-10 nm</subject><subject>Viability</subject><subject>Wire</subject><issn>0914-9244</issn><issn>1349-6336</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><recordid>eNplkMtOwzAQRS0EEqXwBWwssU5x_EjqZQkUkIpYFMQKWY4fbUoSB9tZ9O9J1VIhsRpp5p6Z0QHgOkUTTDm97dYuus7V28b4CeaTjOYnYJQSypOMkOwUjBBPacIxpefgIoQNQoQwxkfgcy5LXykZK9dCZ-GyL5MUwbaBLybKGn5U3sCi8qqvYoB9qNoVvB96KhoNl6a2ySwE05T1dkff1U59weL3lXAJzqysg7k61DF4nz-8FU_J4vXxuZgtEsUIi0lmLcEltjJNMeaUTXWpsEaY5GRKrS4RoTrNc4uIZpJonZkclSWVzGI6DA0Zg5v93s67796EKDau9-1wUmBMMON5jtiQIvuU8i4Eb6zofNVIvxUpEjuP4q9HgbkYPA7UfE9tQpQrc2Skj5WqzT-GHcBjQK2lF6YlP6P5hHI</recordid><startdate>20160101</startdate><enddate>20160101</enddate><creator>Azuma, Tsukasa</creator><creator>Seino, Yuriko</creator><creator>Sato, Hironobu</creator><creator>Kasahara, Yusuke</creator><creator>Kobayashi, Katsutoshi</creator><creator>Kubota, Hitoshi</creator><creator>Kanai, Hideki</creator><creator>Kodera, Katsuyoshi</creator><creator>Kihara, Naoko</creator><creator>Kawamonzen, Yoshiaki</creator><creator>Minegishi, Shinya</creator><creator>Miyagi, Ken</creator><creator>Yamano, Hitoshi</creator><creator>Tobana, Toshikatsu</creator><creator>Shiraishi, Masayuki</creator><creator>Nomura, Satoshi</creator><general>The Society of Photopolymer Science and Technology(SPST)</general><general>Japan Science and Technology Agency</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7SR</scope><scope>7U5</scope><scope>8FD</scope><scope>JG9</scope><scope>L7M</scope></search><sort><creationdate>20160101</creationdate><title>Fabrication of Sub-10 nm Metal Wire Circuits using Directed Self-Assembly of Block Copolymers</title><author>Azuma, Tsukasa ; Seino, Yuriko ; Sato, Hironobu ; Kasahara, Yusuke ; Kobayashi, Katsutoshi ; Kubota, Hitoshi ; Kanai, Hideki ; Kodera, Katsuyoshi ; Kihara, Naoko ; Kawamonzen, Yoshiaki ; Minegishi, Shinya ; Miyagi, Ken ; Yamano, Hitoshi ; Tobana, Toshikatsu ; Shiraishi, Masayuki ; Nomura, Satoshi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c535t-6ff32b2fa11229458dbc2d0237384fdb034d177f03d5a3dd6e70bb4a5f24b03e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>block copolymer</topic><topic>Block copolymers</topic><topic>Circuits</topic><topic>directed self-assembly</topic><topic>Electric wire</topic><topic>Epitaxy</topic><topic>lithography</topic><topic>metal wire circuit</topic><topic>Multiplication</topic><topic>Roughness</topic><topic>Self-assembly</topic><topic>sub-10 nm</topic><topic>Viability</topic><topic>Wire</topic><toplevel>online_resources</toplevel><creatorcontrib>Azuma, Tsukasa</creatorcontrib><creatorcontrib>Seino, Yuriko</creatorcontrib><creatorcontrib>Sato, Hironobu</creatorcontrib><creatorcontrib>Kasahara, Yusuke</creatorcontrib><creatorcontrib>Kobayashi, Katsutoshi</creatorcontrib><creatorcontrib>Kubota, Hitoshi</creatorcontrib><creatorcontrib>Kanai, Hideki</creatorcontrib><creatorcontrib>Kodera, Katsuyoshi</creatorcontrib><creatorcontrib>Kihara, Naoko</creatorcontrib><creatorcontrib>Kawamonzen, Yoshiaki</creatorcontrib><creatorcontrib>Minegishi, Shinya</creatorcontrib><creatorcontrib>Miyagi, Ken</creatorcontrib><creatorcontrib>Yamano, Hitoshi</creatorcontrib><creatorcontrib>Tobana, Toshikatsu</creatorcontrib><creatorcontrib>Shiraishi, Masayuki</creatorcontrib><creatorcontrib>Nomura, Satoshi</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Engineered Materials Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Materials Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Journal of Photopolymer Science and Technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Azuma, Tsukasa</au><au>Seino, Yuriko</au><au>Sato, Hironobu</au><au>Kasahara, Yusuke</au><au>Kobayashi, Katsutoshi</au><au>Kubota, Hitoshi</au><au>Kanai, Hideki</au><au>Kodera, Katsuyoshi</au><au>Kihara, Naoko</au><au>Kawamonzen, Yoshiaki</au><au>Minegishi, Shinya</au><au>Miyagi, Ken</au><au>Yamano, Hitoshi</au><au>Tobana, Toshikatsu</au><au>Shiraishi, Masayuki</au><au>Nomura, Satoshi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Fabrication of Sub-10 nm Metal Wire Circuits using Directed Self-Assembly of Block Copolymers</atitle><jtitle>Journal of Photopolymer Science and Technology</jtitle><addtitle>J. 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| subjects | block copolymer Block copolymers Circuits directed self-assembly Electric wire Epitaxy lithography metal wire circuit Multiplication Roughness Self-assembly sub-10 nm Viability Wire |
| title | Fabrication of Sub-10 nm Metal Wire Circuits using Directed Self-Assembly of Block Copolymers |
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