Instruction packing: Toward fast and energy-efficient instruction scheduling

Traditional dynamic scheduler designs use one issue queue entry per instruction, regardless of the actual number of operands actively involved in the wakeup process. We propose Instruction Packing---a novel microarchitectural technique that reduces both delay and power consumption of the issue queue...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	ACM transactions on architecture and code optimization 2006-06, Vol.3 (2), p.156-181
Hauptverfasser:	Sharkey, Joseph J., Ponomarev, Dmitry V., Ghose, Kanad, Ergin, Oguz
Format:	Artikel
Sprache:	eng
Schlagworte:	Computer architecture Computer programming Scheduling Studies
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!