Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms
The emergence of programmable logic devices as single-chip heterogeneous processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimisation of algorithms on these platforms. This paper describes Abhainn, a rapid implementation...
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| Veröffentlicht in: | Journal of systems architecture 2007-08, Vol.53 (8), p.511-523 |
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| container_title | Journal of systems architecture |
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| creator | McAllister, J. Woods, R. Fischaber, S. Malins, E. |
| description | The emergence of programmable logic devices as single-chip heterogeneous processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimisation of algorithms on these platforms. This paper describes Abhainn, a rapid implementation methodology and toolsuite for translating an algorithmic expression of the system to a working solution on FPGA-centric embedded platforms. Two particular focuses for Abhainn are the automated but configurable realisation of inter-processor communication fabrics, and the establishment of novel dedicated hardware component design methodologies allowing algorithm level transformation for system optimisation. This paper outlines the approaches employed in these areas and demonstrates their effectiveness on high end signal processing beamforming applications. |
| doi_str_mv | 10.1016/j.sysarc.2006.11.005 |
| format | Article |
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| ispartof | Journal of systems architecture, 2007-08, Vol.53 (8), p.511-523 |
| issn | 1383-7621 1873-6165 |
| language | eng |
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| source | Elsevier ScienceDirect Journals |
| subjects | Algorithms Digital signal processors DSP Electronic system level design Embedded computing Embedded systems Field programmable gate arrays FPGA Heterogeneous platform Signal processing Studies |
| title | Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms |
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