An area-efficient VLSI implementation for programmable FIR filters based on a parameterized divide and conquer approach

In this paper, we propose an optimal VLSI implementation for a class of programmable FIR filters with binary coefficients, whose architecture is based on a parameterized divide and conquer approach. The proposed design is shown to be easily extendable to FIR filters with multibit coefficients of arb...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	Journal of systems architecture 2008-12, Vol.54 (12), p.1122-1128
Hauptverfasser:	Poonnen, Thomas, Fam, Adly T.
Format:	Artikel
Sprache:	eng
Schlagworte:	Complementary metal oxide semiconductor Computational complexity measure Computer architecture Finite impulse response filters Parameterized divide and conquer approach Programmable switch matrix Studies Systems design Very large scale integration VLSI
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!