Realize special instructions on clustering VLIW DSP: multiplication-accumulation instruction

BWDSP is a 32bit static scalar digital signal processor with VLIW and SIMD features, which is designed for high-performance computing. Associated special instructions are designed for its special architecture and application scenarios. However, the existing compilation framework doesn't meet th...

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Veröffentlicht in:	arXiv.org 2019-01
Hauptverfasser:	Liu, Binbin, Zheng, Qilong
Format:	Artikel
Sprache:	eng
Schlagworte:	Accumulation Algorithms Clustering Computer architecture Digital signal processing Digital signal processors Microprocessors Multiplication Performance enhancement
Online-Zugang:	Volltext
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