A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans

In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Circuits, systems, and signal processing systems, and signal processing, 2020-02, Vol.39 (2), p.900-918
Hauptverfasser: Shunmugathammal, M., Christopher Columbus, C., Anand, S.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 918
container_issue 2
container_start_page 900
container_title Circuits, systems, and signal processing
container_volume 39
creator Shunmugathammal, M.
Christopher Columbus, C.
Anand, S.
description In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes.
doi_str_mv 10.1007/s00034-019-01054-9
format Article
fullrecord <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_2182955609</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2182955609</sourcerecordid><originalsourceid>FETCH-LOGICAL-c319t-104fdb3e06a15a730d607d5af4a99b3ce5a1f3d55659116975060b5b7b01a34f3</originalsourceid><addsrcrecordid>eNp9kE1PAyEURYnRxFr9A65IXKOPYZgZlm1jtUljF37EHWE6TKWZgQrU-PHnpdbEnQsC7-WeS3IQOqdwSQHKqwAALCdARTrAcyIO0IByRgmvyuoQDSArKwIVfT5GJyGsISVzkQ3Q1wjfuTfd4XH0WuOJdyGk2ZOxCrrB96bfdiqm18harTpjV3jUrZw38aXHrfN44vraWBXTSnV4sYmmN58qGmexsfhpfj_DU_OuG7LYxoRrPO2c85tO2XCKjlrVBX32ew_R4_T6YXJL5oub2WQ0J0tGRSQU8rapmYZCUa5KBk0BZcNVmysharbUXNGWNZwXXFBaiJJDATWvyxqoYnnLhuhi37vx7nWrQ5Rrt_U2fSkzWmUikSBSKtunljsHXrdy402v_IekIHeS5V6yTOrkj2S5g9geCilsV9r_Vf9DfQNGLoAD</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2182955609</pqid></control><display><type>article</type><title>A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans</title><source>SpringerLink Journals</source><creator>Shunmugathammal, M. ; Christopher Columbus, C. ; Anand, S.</creator><creatorcontrib>Shunmugathammal, M. ; Christopher Columbus, C. ; Anand, S.</creatorcontrib><description>In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes.</description><identifier>ISSN: 0278-081X</identifier><identifier>EISSN: 1531-5878</identifier><identifier>DOI: 10.1007/s00034-019-01054-9</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>Algorithms ; Circuit design ; Circuits and Systems ; Combinatorial analysis ; Computer simulation ; Crossovers ; Electrical Engineering ; Electronics and Microelectronics ; Engineering ; Floorplans ; Instrumentation ; Integrated circuits ; Optimization ; Signal,Image and Speech Processing ; Simulated annealing ; Simulation ; State of the art ; Very large scale integration</subject><ispartof>Circuits, systems, and signal processing, 2020-02, Vol.39 (2), p.900-918</ispartof><rights>Springer Science+Business Media, LLC, part of Springer Nature 2019</rights><rights>Circuits, Systems, and Signal Processing is a copyright of Springer, (2019). All Rights Reserved.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c319t-104fdb3e06a15a730d607d5af4a99b3ce5a1f3d55659116975060b5b7b01a34f3</citedby><cites>FETCH-LOGICAL-c319t-104fdb3e06a15a730d607d5af4a99b3ce5a1f3d55659116975060b5b7b01a34f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s00034-019-01054-9$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/s00034-019-01054-9$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>314,776,780,27901,27902,41464,42533,51294</link.rule.ids></links><search><creatorcontrib>Shunmugathammal, M.</creatorcontrib><creatorcontrib>Christopher Columbus, C.</creatorcontrib><creatorcontrib>Anand, S.</creatorcontrib><title>A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans</title><title>Circuits, systems, and signal processing</title><addtitle>Circuits Syst Signal Process</addtitle><description>In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes.</description><subject>Algorithms</subject><subject>Circuit design</subject><subject>Circuits and Systems</subject><subject>Combinatorial analysis</subject><subject>Computer simulation</subject><subject>Crossovers</subject><subject>Electrical Engineering</subject><subject>Electronics and Microelectronics</subject><subject>Engineering</subject><subject>Floorplans</subject><subject>Instrumentation</subject><subject>Integrated circuits</subject><subject>Optimization</subject><subject>Signal,Image and Speech Processing</subject><subject>Simulated annealing</subject><subject>Simulation</subject><subject>State of the art</subject><subject>Very large scale integration</subject><issn>0278-081X</issn><issn>1531-5878</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>BENPR</sourceid><recordid>eNp9kE1PAyEURYnRxFr9A65IXKOPYZgZlm1jtUljF37EHWE6TKWZgQrU-PHnpdbEnQsC7-WeS3IQOqdwSQHKqwAALCdARTrAcyIO0IByRgmvyuoQDSArKwIVfT5GJyGsISVzkQ3Q1wjfuTfd4XH0WuOJdyGk2ZOxCrrB96bfdiqm18harTpjV3jUrZw38aXHrfN44vraWBXTSnV4sYmmN58qGmexsfhpfj_DU_OuG7LYxoRrPO2c85tO2XCKjlrVBX32ew_R4_T6YXJL5oub2WQ0J0tGRSQU8rapmYZCUa5KBk0BZcNVmysharbUXNGWNZwXXFBaiJJDATWvyxqoYnnLhuhi37vx7nWrQ5Rrt_U2fSkzWmUikSBSKtunljsHXrdy402v_IekIHeS5V6yTOrkj2S5g9geCilsV9r_Vf9DfQNGLoAD</recordid><startdate>20200201</startdate><enddate>20200201</enddate><creator>Shunmugathammal, M.</creator><creator>Christopher Columbus, C.</creator><creator>Anand, S.</creator><general>Springer US</general><general>Springer Nature B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>3V.</scope><scope>7SC</scope><scope>7SP</scope><scope>7XB</scope><scope>88I</scope><scope>8AL</scope><scope>8AO</scope><scope>8FD</scope><scope>8FE</scope><scope>8FG</scope><scope>8FK</scope><scope>ABJCF</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>ARAPS</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>DWQXO</scope><scope>GNUQQ</scope><scope>HCIFZ</scope><scope>JQ2</scope><scope>K7-</scope><scope>L6V</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>M0N</scope><scope>M2P</scope><scope>M7S</scope><scope>P5Z</scope><scope>P62</scope><scope>PHGZM</scope><scope>PHGZT</scope><scope>PKEHL</scope><scope>PQEST</scope><scope>PQGLB</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PRINS</scope><scope>PTHSS</scope><scope>Q9U</scope><scope>S0W</scope></search><sort><creationdate>20200201</creationdate><title>A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans</title><author>Shunmugathammal, M. ; Christopher Columbus, C. ; Anand, S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c319t-104fdb3e06a15a730d607d5af4a99b3ce5a1f3d55659116975060b5b7b01a34f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Algorithms</topic><topic>Circuit design</topic><topic>Circuits and Systems</topic><topic>Combinatorial analysis</topic><topic>Computer simulation</topic><topic>Crossovers</topic><topic>Electrical Engineering</topic><topic>Electronics and Microelectronics</topic><topic>Engineering</topic><topic>Floorplans</topic><topic>Instrumentation</topic><topic>Integrated circuits</topic><topic>Optimization</topic><topic>Signal,Image and Speech Processing</topic><topic>Simulated annealing</topic><topic>Simulation</topic><topic>State of the art</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Shunmugathammal, M.</creatorcontrib><creatorcontrib>Christopher Columbus, C.</creatorcontrib><creatorcontrib>Anand, S.</creatorcontrib><collection>CrossRef</collection><collection>ProQuest Central (Corporate)</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>ProQuest Central (purchase pre-March 2016)</collection><collection>Science Database (Alumni Edition)</collection><collection>Computing Database (Alumni Edition)</collection><collection>ProQuest Pharma Collection</collection><collection>Technology Research Database</collection><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>ProQuest Central (Alumni) (purchase pre-March 2016)</collection><collection>Materials Science &amp; Engineering Collection</collection><collection>ProQuest Central (Alumni Edition)</collection><collection>ProQuest Central UK/Ireland</collection><collection>Advanced Technologies &amp; Aerospace Collection</collection><collection>ProQuest Central Essentials</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Central Korea</collection><collection>ProQuest Central Student</collection><collection>SciTech Premium Collection</collection><collection>ProQuest Computer Science Collection</collection><collection>Computer Science Database</collection><collection>ProQuest Engineering Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>Computing Database</collection><collection>Science Database</collection><collection>Engineering Database</collection><collection>Advanced Technologies &amp; Aerospace Database</collection><collection>ProQuest Advanced Technologies &amp; Aerospace Collection</collection><collection>ProQuest Central (New)</collection><collection>ProQuest One Academic (New)</collection><collection>ProQuest One Academic Middle East (New)</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Applied &amp; Life Sciences</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><collection>ProQuest Central China</collection><collection>Engineering Collection</collection><collection>ProQuest Central Basic</collection><collection>DELNET Engineering &amp; Technology Collection</collection><jtitle>Circuits, systems, and signal processing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Shunmugathammal, M.</au><au>Christopher Columbus, C.</au><au>Anand, S.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans</atitle><jtitle>Circuits, systems, and signal processing</jtitle><stitle>Circuits Syst Signal Process</stitle><date>2020-02-01</date><risdate>2020</risdate><volume>39</volume><issue>2</issue><spage>900</spage><epage>918</epage><pages>900-918</pages><issn>0278-081X</issn><eissn>1531-5878</eissn><abstract>In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes.</abstract><cop>New York</cop><pub>Springer US</pub><doi>10.1007/s00034-019-01054-9</doi><tpages>19</tpages></addata></record>
fulltext fulltext
identifier ISSN: 0278-081X
ispartof Circuits, systems, and signal processing, 2020-02, Vol.39 (2), p.900-918
issn 0278-081X
1531-5878
language eng
recordid cdi_proquest_journals_2182955609
source SpringerLink Journals
subjects Algorithms
Circuit design
Circuits and Systems
Combinatorial analysis
Computer simulation
Crossovers
Electrical Engineering
Electronics and Microelectronics
Engineering
Floorplans
Instrumentation
Integrated circuits
Optimization
Signal,Image and Speech Processing
Simulated annealing
Simulation
State of the art
Very large scale integration
title A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-15T23%3A01%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Novel%20Btree%20Crossover-Based%20Simulated%20Annealing%20Algorithm%20for%20Combinatorial%20Optimization%20in%20VLSI%20Fixed-Outline%20Floorplans&rft.jtitle=Circuits,%20systems,%20and%20signal%20processing&rft.au=Shunmugathammal,%20M.&rft.date=2020-02-01&rft.volume=39&rft.issue=2&rft.spage=900&rft.epage=918&rft.pages=900-918&rft.issn=0278-081X&rft.eissn=1531-5878&rft_id=info:doi/10.1007/s00034-019-01054-9&rft_dat=%3Cproquest_cross%3E2182955609%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2182955609&rft_id=info:pmid/&rfr_iscdi=true