A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans
In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (...
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Veröffentlicht in: | Circuits, systems, and signal processing systems, and signal processing, 2020-02, Vol.39 (2), p.900-918 |
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description | In VLSI physical design, floorplanning is an important step. When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes. |
doi_str_mv | 10.1007/s00034-019-01054-9 |
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When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes.</description><identifier>ISSN: 0278-081X</identifier><identifier>EISSN: 1531-5878</identifier><identifier>DOI: 10.1007/s00034-019-01054-9</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>Algorithms ; Circuit design ; Circuits and Systems ; Combinatorial analysis ; Computer simulation ; Crossovers ; Electrical Engineering ; Electronics and Microelectronics ; Engineering ; Floorplans ; Instrumentation ; Integrated circuits ; Optimization ; Signal,Image and Speech Processing ; Simulated annealing ; Simulation ; State of the art ; Very large scale integration</subject><ispartof>Circuits, systems, and signal processing, 2020-02, Vol.39 (2), p.900-918</ispartof><rights>Springer Science+Business Media, LLC, part of Springer Nature 2019</rights><rights>Circuits, Systems, and Signal Processing is a copyright of Springer, (2019). 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When there is a substantial increase in the number of modules in circuits, physical design automation tools stand in need of efficient algorithms. This paper proposes a new algorithm, namely B*tree crossover simulated annealing algorithm (BCSA), for fixed-outline floorplanning problem. This work aims to minimize dead space with the objective of optimizing area and wire length. A novel crossover in B*tree is introduced with the efficient simulated annealing algorithm. Proposed approaches improve the exploration capabilities of simple simulated annealing algorithm. BCSA is tested on famous Microelectronics Center of North Carolina benchmark circuits. Results are comparatively better than most of the state-of-the-art algorithms. BCSA produces less dead space. BCSA algorithm is found more efficient for problems of larger sizes.</abstract><cop>New York</cop><pub>Springer US</pub><doi>10.1007/s00034-019-01054-9</doi><tpages>19</tpages></addata></record> |
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subjects | Algorithms Circuit design Circuits and Systems Combinatorial analysis Computer simulation Crossovers Electrical Engineering Electronics and Microelectronics Engineering Floorplans Instrumentation Integrated circuits Optimization Signal,Image and Speech Processing Simulated annealing Simulation State of the art Very large scale integration |
title | A Novel Btree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans |
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