Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs
In this paper, a comprehensive system behavioral model of frequency-interleaved analog-to-digital converters (FI-ADCs) is presented. The model addresses mismatch errors due to imperfect channel separation, incomplete anti-aliasing, in-phase/quadrature branch imbalances, and jitter-induced distortion...
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Veröffentlicht in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2019-02, Vol.66 (2), p.655-668 |
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description | In this paper, a comprehensive system behavioral model of frequency-interleaved analog-to-digital converters (FI-ADCs) is presented. The model addresses mismatch errors due to imperfect channel separation, incomplete anti-aliasing, in-phase/quadrature branch imbalances, and jitter-induced distortions. Using this model, an integrated analysis of combined channel mismatch effects is provided. Given error parameters or their distributions, closed-form expressions of the expected output signal-to-noise ratio and image rejection ratio are formulated for FI-ADCs with an arbitrary number of channels. The inherent circuit behaviors, sampling clock jitters, and local oscillator phase noise effects are also discussed. Based on the analysis and modeling, a discrete-time equivalent model for FI-ADC systems is derived. Therefrom, an integrated channel mismatch compensation scheme is proposed that contrasts existing signal recovery approaches which calibrate specific types of errors separately. The performance of this novel method is compared with conventional solutions using extensive simulations. Very favorable numerical results are observed. |
doi_str_mv | 10.1109/TCSI.2018.2869214 |
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The model addresses mismatch errors due to imperfect channel separation, incomplete anti-aliasing, in-phase/quadrature branch imbalances, and jitter-induced distortions. Using this model, an integrated analysis of combined channel mismatch effects is provided. Given error parameters or their distributions, closed-form expressions of the expected output signal-to-noise ratio and image rejection ratio are formulated for FI-ADCs with an arbitrary number of channels. The inherent circuit behaviors, sampling clock jitters, and local oscillator phase noise effects are also discussed. Based on the analysis and modeling, a discrete-time equivalent model for FI-ADC systems is derived. Therefrom, an integrated channel mismatch compensation scheme is proposed that contrasts existing signal recovery approaches which calibrate specific types of errors separately. The performance of this novel method is compared with conventional solutions using extensive simulations. Very favorable numerical results are observed.</description><identifier>ISSN: 1549-8328</identifier><identifier>EISSN: 1558-0806</identifier><identifier>DOI: 10.1109/TCSI.2018.2869214</identifier><identifier>CODEN: ITCSCH</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Aliasing ; Analog to digital conversion ; Analog to digital converters ; Analog-to-digital converter (ADC) ; Analytical models ; channel mismatch ; Clocks ; Computer simulation ; error analysis ; frequency-interleaving ; I/Q imbalance ; Integrated circuit modeling ; Jitter ; Mathematical models ; Mirrors ; Mixers ; phase noise ; Signal reconstruction ; Signal to noise ratio ; Vibration</subject><ispartof>IEEE transactions on circuits and systems. I, Regular papers, 2019-02, Vol.66 (2), p.655-668</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c359t-c8ae7d4554fb09f3e33672460eef0d799768e74e33032df992fa8f8f19c7d1de3</citedby><cites>FETCH-LOGICAL-c359t-c8ae7d4554fb09f3e33672460eef0d799768e74e33032df992fa8f8f19c7d1de3</cites><orcidid>0000-0002-3374-3113</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8472249$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54736</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8472249$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Song, Jinpeng</creatorcontrib><creatorcontrib>Tian, Shulin</creatorcontrib><creatorcontrib>Hu, Yu-Hen</creatorcontrib><title>Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs</title><title>IEEE transactions on circuits and systems. I, Regular papers</title><addtitle>TCSI</addtitle><description>In this paper, a comprehensive system behavioral model of frequency-interleaved analog-to-digital converters (FI-ADCs) is presented. The model addresses mismatch errors due to imperfect channel separation, incomplete anti-aliasing, in-phase/quadrature branch imbalances, and jitter-induced distortions. Using this model, an integrated analysis of combined channel mismatch effects is provided. Given error parameters or their distributions, closed-form expressions of the expected output signal-to-noise ratio and image rejection ratio are formulated for FI-ADCs with an arbitrary number of channels. The inherent circuit behaviors, sampling clock jitters, and local oscillator phase noise effects are also discussed. Based on the analysis and modeling, a discrete-time equivalent model for FI-ADC systems is derived. Therefrom, an integrated channel mismatch compensation scheme is proposed that contrasts existing signal recovery approaches which calibrate specific types of errors separately. The performance of this novel method is compared with conventional solutions using extensive simulations. Very favorable numerical results are observed.</description><subject>Aliasing</subject><subject>Analog to digital conversion</subject><subject>Analog to digital converters</subject><subject>Analog-to-digital converter (ADC)</subject><subject>Analytical models</subject><subject>channel mismatch</subject><subject>Clocks</subject><subject>Computer simulation</subject><subject>error analysis</subject><subject>frequency-interleaving</subject><subject>I/Q imbalance</subject><subject>Integrated circuit modeling</subject><subject>Jitter</subject><subject>Mathematical models</subject><subject>Mirrors</subject><subject>Mixers</subject><subject>phase noise</subject><subject>Signal reconstruction</subject><subject>Signal to noise ratio</subject><subject>Vibration</subject><issn>1549-8328</issn><issn>1558-0806</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE9LAzEQxYMoWKsfQLwseN6af7tJjmVttVDxYL14CWl2QrdsszXZCv32zdLiaWYe7w0zP4QeCZ4QgtXLqvpaTCgmckJlqSjhV2hEikLmWOLyeui5yiWj8hbdxbjFmCrMyAj9TL1pj7GJmfF1VnUhgO2bzmedS9Nu3XhI8sZ4D2320cSd6e0mmzmXbDFrfDYP8HsAb4_5wvcQWjB_KTF9reI9unGmjfBwqWP0PZ-tqvd8-fm2qKbL3LJC9bmVBkTNi4K7NVaOAWOloLzEAA7XQilRShA8yZjR2ilFnZFOOqKsqEkNbIyez3v3oUunxF5vu0NIb0VNicCCSkVpcpGzy4YuxgBO70OzM-GoCdYDQj0g1ANCfUGYMk_nTAMA_37JBaVcsROUuWy3</recordid><startdate>20190201</startdate><enddate>20190201</enddate><creator>Song, Jinpeng</creator><creator>Tian, Shulin</creator><creator>Hu, Yu-Hen</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-3374-3113</orcidid></search><sort><creationdate>20190201</creationdate><title>Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs</title><author>Song, Jinpeng ; Tian, Shulin ; Hu, Yu-Hen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c359t-c8ae7d4554fb09f3e33672460eef0d799768e74e33032df992fa8f8f19c7d1de3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>Aliasing</topic><topic>Analog to digital conversion</topic><topic>Analog to digital converters</topic><topic>Analog-to-digital converter (ADC)</topic><topic>Analytical models</topic><topic>channel mismatch</topic><topic>Clocks</topic><topic>Computer simulation</topic><topic>error analysis</topic><topic>frequency-interleaving</topic><topic>I/Q imbalance</topic><topic>Integrated circuit modeling</topic><topic>Jitter</topic><topic>Mathematical models</topic><topic>Mirrors</topic><topic>Mixers</topic><topic>phase noise</topic><topic>Signal reconstruction</topic><topic>Signal to noise ratio</topic><topic>Vibration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Song, Jinpeng</creatorcontrib><creatorcontrib>Tian, Shulin</creatorcontrib><creatorcontrib>Hu, Yu-Hen</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Song, Jinpeng</au><au>Tian, Shulin</au><au>Hu, Yu-Hen</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs</atitle><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle><stitle>TCSI</stitle><date>2019-02-01</date><risdate>2019</risdate><volume>66</volume><issue>2</issue><spage>655</spage><epage>668</epage><pages>655-668</pages><issn>1549-8328</issn><eissn>1558-0806</eissn><coden>ITCSCH</coden><abstract>In this paper, a comprehensive system behavioral model of frequency-interleaved analog-to-digital converters (FI-ADCs) is presented. The model addresses mismatch errors due to imperfect channel separation, incomplete anti-aliasing, in-phase/quadrature branch imbalances, and jitter-induced distortions. Using this model, an integrated analysis of combined channel mismatch effects is provided. Given error parameters or their distributions, closed-form expressions of the expected output signal-to-noise ratio and image rejection ratio are formulated for FI-ADCs with an arbitrary number of channels. The inherent circuit behaviors, sampling clock jitters, and local oscillator phase noise effects are also discussed. Based on the analysis and modeling, a discrete-time equivalent model for FI-ADC systems is derived. Therefrom, an integrated channel mismatch compensation scheme is proposed that contrasts existing signal recovery approaches which calibrate specific types of errors separately. The performance of this novel method is compared with conventional solutions using extensive simulations. Very favorable numerical results are observed.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSI.2018.2869214</doi><tpages>14</tpages><orcidid>https://orcid.org/0000-0002-3374-3113</orcidid></addata></record> |
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subjects | Aliasing Analog to digital conversion Analog to digital converters Analog-to-digital converter (ADC) Analytical models channel mismatch Clocks Computer simulation error analysis frequency-interleaving I/Q imbalance Integrated circuit modeling Jitter Mathematical models Mirrors Mixers phase noise Signal reconstruction Signal to noise ratio Vibration |
title | Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs |
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