Approximate Sum-of-Products Designs Based on Distributed Arithmetic
Approximate circuits provide high performance and require low power. Sum-of-products (SOP) units are key elements in many digital signal processing applications. In this brief, three approximate SOP (ASOP) models which are based on the distributed arithmetic are proposed. They are designed for diffe...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2018-08, Vol.26 (8), p.1604-1608 |
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creator | Venkatachalam, Suganthi Ko, Seok-Bum |
description | Approximate circuits provide high performance and require low power. Sum-of-products (SOP) units are key elements in many digital signal processing applications. In this brief, three approximate SOP (ASOP) models which are based on the distributed arithmetic are proposed. They are designed for different levels of accuracy. First model of ASOP achieves an improvement up to 64% on area and 70% on power, when compared with conventional unit. Other two models provide an improvement of 32% and 48% on area and 54% and 58% on power, respectively, with a reduced error rate compared with the first model. Third model achieves the mean relative error and normalized error distance as low as 0.05% and 0.009%, respectively. Performance of approximate units is evaluated with a noisy image smoothing application, where the proposed models are capable of achieving higher peak signal-to-noise ratio than the existing state-of-the-art techniques. It is shown that the proposed approximate models achieve higher processing accuracy than existing works but with significant improvements in power and performance. |
doi_str_mv | 10.1109/TVLSI.2018.2818980 |
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Sum-of-products (SOP) units are key elements in many digital signal processing applications. In this brief, three approximate SOP (ASOP) models which are based on the distributed arithmetic are proposed. They are designed for different levels of accuracy. First model of ASOP achieves an improvement up to 64% on area and 70% on power, when compared with conventional unit. Other two models provide an improvement of 32% and 48% on area and 54% and 58% on power, respectively, with a reduced error rate compared with the first model. Third model achieves the mean relative error and normalized error distance as low as 0.05% and 0.009%, respectively. Performance of approximate units is evaluated with a noisy image smoothing application, where the proposed models are capable of achieving higher peak signal-to-noise ratio than the existing state-of-the-art techniques. It is shown that the proposed approximate models achieve higher processing accuracy than existing works but with significant improvements in power and performance.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2018.2818980</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Adders ; Approximate computing ; Arithmetic ; Circuit design ; Computational modeling ; Digital signal processing ; distributed arithmetic ; Errors ; Hardware ; Integrated circuit modeling ; low power ; Measurement ; Model accuracy ; Signal processing ; Smoothing methods ; sum of products (SOP) ; Very large scale integration</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 2018-08, Vol.26 (8), p.1604-1608</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c295t-91da1a7c6d11bfcacc9cfb7551530f89956850f6460d9af9912edd35a2b2869d3</citedby><cites>FETCH-LOGICAL-c295t-91da1a7c6d11bfcacc9cfb7551530f89956850f6460d9af9912edd35a2b2869d3</cites><orcidid>0000-0002-9287-317X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8333766$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,781,785,797,27928,27929,54762</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8333766$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Venkatachalam, Suganthi</creatorcontrib><creatorcontrib>Ko, Seok-Bum</creatorcontrib><title>Approximate Sum-of-Products Designs Based on Distributed Arithmetic</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>Approximate circuits provide high performance and require low power. Sum-of-products (SOP) units are key elements in many digital signal processing applications. In this brief, three approximate SOP (ASOP) models which are based on the distributed arithmetic are proposed. They are designed for different levels of accuracy. First model of ASOP achieves an improvement up to 64% on area and 70% on power, when compared with conventional unit. Other two models provide an improvement of 32% and 48% on area and 54% and 58% on power, respectively, with a reduced error rate compared with the first model. Third model achieves the mean relative error and normalized error distance as low as 0.05% and 0.009%, respectively. Performance of approximate units is evaluated with a noisy image smoothing application, where the proposed models are capable of achieving higher peak signal-to-noise ratio than the existing state-of-the-art techniques. It is shown that the proposed approximate models achieve higher processing accuracy than existing works but with significant improvements in power and performance.</description><subject>Adders</subject><subject>Approximate computing</subject><subject>Arithmetic</subject><subject>Circuit design</subject><subject>Computational modeling</subject><subject>Digital signal processing</subject><subject>distributed arithmetic</subject><subject>Errors</subject><subject>Hardware</subject><subject>Integrated circuit modeling</subject><subject>low power</subject><subject>Measurement</subject><subject>Model accuracy</subject><subject>Signal processing</subject><subject>Smoothing methods</subject><subject>sum of products (SOP)</subject><subject>Very large scale integration</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LAzEQhoMoWKt_QC8LnlMzSZNNjrX1o1BQaPUasvnQLbZbkyzovze14lxmBuadd-ZB6BLICICom9XrYjkfUQJyRCVIJckRGgDnNVYljktNBMOSAjlFZymtCYHxWJEBmk52u9h9tRuTfbXsN7gL-Dl2rrc5VTOf2rdtqm5N8q7qttWsTTm2TZ9LO4ltft_43NpzdBLMR_IXf3mIXu7vVtNHvHh6mE8nC2yp4hkrcAZMbYUDaII11iobmppz4IwEqRQXkpMgxoI4ZYJSQL1zjBvaUCmUY0N0fdhbLv7sfcp63fVxWyw1BaiB1MWnTNHDlI1dStEHvYvlvfitgeg9LP0LS-9h6T9YRXR1ELXe-3-BZIzVQrAfI85luw</recordid><startdate>20180801</startdate><enddate>20180801</enddate><creator>Venkatachalam, Suganthi</creator><creator>Ko, Seok-Bum</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-9287-317X</orcidid></search><sort><creationdate>20180801</creationdate><title>Approximate Sum-of-Products Designs Based on Distributed Arithmetic</title><author>Venkatachalam, Suganthi ; Ko, Seok-Bum</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c295t-91da1a7c6d11bfcacc9cfb7551530f89956850f6460d9af9912edd35a2b2869d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>Adders</topic><topic>Approximate computing</topic><topic>Arithmetic</topic><topic>Circuit design</topic><topic>Computational modeling</topic><topic>Digital signal processing</topic><topic>distributed arithmetic</topic><topic>Errors</topic><topic>Hardware</topic><topic>Integrated circuit modeling</topic><topic>low power</topic><topic>Measurement</topic><topic>Model accuracy</topic><topic>Signal processing</topic><topic>Smoothing methods</topic><topic>sum of products (SOP)</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Venkatachalam, Suganthi</creatorcontrib><creatorcontrib>Ko, Seok-Bum</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Venkatachalam, Suganthi</au><au>Ko, Seok-Bum</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Approximate Sum-of-Products Designs Based on Distributed Arithmetic</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2018-08-01</date><risdate>2018</risdate><volume>26</volume><issue>8</issue><spage>1604</spage><epage>1608</epage><pages>1604-1608</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>Approximate circuits provide high performance and require low power. Sum-of-products (SOP) units are key elements in many digital signal processing applications. In this brief, three approximate SOP (ASOP) models which are based on the distributed arithmetic are proposed. They are designed for different levels of accuracy. First model of ASOP achieves an improvement up to 64% on area and 70% on power, when compared with conventional unit. Other two models provide an improvement of 32% and 48% on area and 54% and 58% on power, respectively, with a reduced error rate compared with the first model. Third model achieves the mean relative error and normalized error distance as low as 0.05% and 0.009%, respectively. Performance of approximate units is evaluated with a noisy image smoothing application, where the proposed models are capable of achieving higher peak signal-to-noise ratio than the existing state-of-the-art techniques. It is shown that the proposed approximate models achieve higher processing accuracy than existing works but with significant improvements in power and performance.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TVLSI.2018.2818980</doi><tpages>5</tpages><orcidid>https://orcid.org/0000-0002-9287-317X</orcidid></addata></record> |
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subjects | Adders Approximate computing Arithmetic Circuit design Computational modeling Digital signal processing distributed arithmetic Errors Hardware Integrated circuit modeling low power Measurement Model accuracy Signal processing Smoothing methods sum of products (SOP) Very large scale integration |
title | Approximate Sum-of-Products Designs Based on Distributed Arithmetic |
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