HIL simulation of the DTC for a three-level inverter fed a PMSM with neutral-point balancing control based on FPGA
This paper presents a hardware description methodology for the direct torque control (DTC) of a three-level voltage source inverter (VSI) fed a permanent magnet synchronous motor drive with neutral-point balancing control algorithm based on field programmable gate array (FPGA). The main drawback of...
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Veröffentlicht in: | Electrical engineering 2018-09, Vol.100 (3), p.1441-1454 |
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creator | Sandre-Hernandez, Omar Rangel-Magdaleno, Jose Morales-Caporal, Roberto Bonilla-Huerta, E. |
description | This paper presents a hardware description methodology for the direct torque control (DTC) of a three-level voltage source inverter (VSI) fed a permanent magnet synchronous motor drive with neutral-point balancing control algorithm based on field programmable gate array (FPGA). The main drawback of the conventional DTC during its digital implementation is the high torque ripple, and to overcome this problem, the use of a three-level VSI and a simple hardware description methodology for DTC based on FPGA is proposed. However, the circuit limitations of the three-level inverter, such as neutral-point balance, should be taken into account in the selection of the future space vector applied to the machine; for this reason, a simple and effective procedure to maintain the neutral-point balance is presented. The proposed methodology has been validated using hardware in the loop simulation, and results under different operating points are presented. |
doi_str_mv | 10.1007/s00202-017-0597-0 |
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The main drawback of the conventional DTC during its digital implementation is the high torque ripple, and to overcome this problem, the use of a three-level VSI and a simple hardware description methodology for DTC based on FPGA is proposed. However, the circuit limitations of the three-level inverter, such as neutral-point balance, should be taken into account in the selection of the future space vector applied to the machine; for this reason, a simple and effective procedure to maintain the neutral-point balance is presented. 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The main drawback of the conventional DTC during its digital implementation is the high torque ripple, and to overcome this problem, the use of a three-level VSI and a simple hardware description methodology for DTC based on FPGA is proposed. However, the circuit limitations of the three-level inverter, such as neutral-point balance, should be taken into account in the selection of the future space vector applied to the machine; for this reason, a simple and effective procedure to maintain the neutral-point balance is presented. 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subjects | Computer simulation Control algorithms Control theory Economics and Management Electrical Engineering Electrical Machines and Networks Energy Policy Engineering Field programmable gate arrays Hardware Hardware-in-the-loop simulation Methodology Original Paper Permanent magnets Power Electronics Synchronous motors Torque |
title | HIL simulation of the DTC for a three-level inverter fed a PMSM with neutral-point balancing control based on FPGA |
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