Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing

Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice some of the key benefits of rings by introducing more complex in-ring buffering and buffere...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:arXiv.org 2016-02
Hauptverfasser: Ausavarungnirun, Rachata, Fallin, Chris, Yu, Xiangyao, Chang, Kevin Kai-Wei, Nazario, Greg, Das, Reetuparna, Loh, Gabriel H, Mutlu, Onur
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title arXiv.org
container_volume
creator Ausavarungnirun, Rachata
Fallin, Chris
Yu, Xiangyao
Chang, Kevin Kai-Wei
Nazario, Greg
Das, Reetuparna
Loh, Gabriel H
Mutlu, Onur
description Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice some of the key benefits of rings by introducing more complex in-ring buffering and buffered flow control. Our goal in this paper is to design a new hierarchical ring interconnect that can maintain most of the simplicity of traditional ring designs (no in-ring buffering or buffered flow control) while achieving high scalability as more complex buffered hierarchical ring designs. Our design, called HiRD (Hierarchical Rings with Deflection), includes features that allow us to mostly maintain the simplicity of traditional simple ring topologies while providing higher energy efficiency and scalability. First, HiRD does not have any buffering or buffered flow control within individual rings, and requires only a small amount of buffering between the ring hierarchy levels. When inter-ring buffers are full, our design simply deflects flits so that they circle the ring and try again, which eliminates the need for in-ring buffering. Second, we introduce two simple mechanisms that provides an end-to-end delivery guarantee within the entire network without impacting the critical path or latency of the vast majority of network traffic. HiRD attains equal or better performance at better energy efficiency than multiple versions of both a previous hierarchical ring design and a traditional single ring design. We also analyze our design's characteristics and injection and delivery guarantees. We conclude that HiRD can be a compelling design point that allows higher energy efficiency and scalability while retaining the simplicity and appeal of conventional ring-based designs.
format Article
fullrecord <record><control><sourceid>proquest</sourceid><recordid>TN_cdi_proquest_journals_2078127081</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2078127081</sourcerecordid><originalsourceid>FETCH-proquest_journals_20781270813</originalsourceid><addsrcrecordid>eNqNjc1qwzAQhEWgkNDmHRZyNshyE_saHAffWkLvQVVW9gZ7lUhWSu598Ko_D9DTwHwfMzOxUEWRZ9WzUnOxDOEspVSbUq3XxUJ8bk1PeCPu4N1NPbTU9dAw-u4OjbVkCNncQfPpF72it86Pmg0CMbxwVvd0gdqNY2QyeiLHEMP3XkvotU_zRg9wSE2AD0oXO7QDmh_x4OKUwJN4sHoIuPzLR7HaN291m128u0YM0_HsoueEjkqWVa5KWeXF_6wvEZ1RtA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2078127081</pqid></control><display><type>article</type><title>Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing</title><source>Freely Accessible Journals</source><creator>Ausavarungnirun, Rachata ; Fallin, Chris ; Yu, Xiangyao ; Chang, Kevin Kai-Wei ; Nazario, Greg ; Das, Reetuparna ; Loh, Gabriel H ; Mutlu, Onur</creator><creatorcontrib>Ausavarungnirun, Rachata ; Fallin, Chris ; Yu, Xiangyao ; Chang, Kevin Kai-Wei ; Nazario, Greg ; Das, Reetuparna ; Loh, Gabriel H ; Mutlu, Onur</creatorcontrib><description>Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice some of the key benefits of rings by introducing more complex in-ring buffering and buffered flow control. Our goal in this paper is to design a new hierarchical ring interconnect that can maintain most of the simplicity of traditional ring designs (no in-ring buffering or buffered flow control) while achieving high scalability as more complex buffered hierarchical ring designs. Our design, called HiRD (Hierarchical Rings with Deflection), includes features that allow us to mostly maintain the simplicity of traditional simple ring topologies while providing higher energy efficiency and scalability. First, HiRD does not have any buffering or buffered flow control within individual rings, and requires only a small amount of buffering between the ring hierarchy levels. When inter-ring buffers are full, our design simply deflects flits so that they circle the ring and try again, which eliminates the need for in-ring buffering. Second, we introduce two simple mechanisms that provides an end-to-end delivery guarantee within the entire network without impacting the critical path or latency of the vast majority of network traffic. HiRD attains equal or better performance at better energy efficiency than multiple versions of both a previous hierarchical ring design and a traditional single ring design. We also analyze our design's characteristics and injection and delivery guarantees. We conclude that HiRD can be a compelling design point that allows higher energy efficiency and scalability while retaining the simplicity and appeal of conventional ring-based designs.</description><identifier>EISSN: 2331-8422</identifier><language>eng</language><publisher>Ithaca: Cornell University Library, arXiv.org</publisher><subject>Buffers ; Communications traffic ; Critical path ; Deflection ; Energy efficiency ; Flow control ; Power efficiency ; Rings (mathematics) ; Topology</subject><ispartof>arXiv.org, 2016-02</ispartof><rights>2016. This work is published under http://arxiv.org/licenses/nonexclusive-distrib/1.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>778,782</link.rule.ids></links><search><creatorcontrib>Ausavarungnirun, Rachata</creatorcontrib><creatorcontrib>Fallin, Chris</creatorcontrib><creatorcontrib>Yu, Xiangyao</creatorcontrib><creatorcontrib>Chang, Kevin Kai-Wei</creatorcontrib><creatorcontrib>Nazario, Greg</creatorcontrib><creatorcontrib>Das, Reetuparna</creatorcontrib><creatorcontrib>Loh, Gabriel H</creatorcontrib><creatorcontrib>Mutlu, Onur</creatorcontrib><title>Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing</title><title>arXiv.org</title><description>Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice some of the key benefits of rings by introducing more complex in-ring buffering and buffered flow control. Our goal in this paper is to design a new hierarchical ring interconnect that can maintain most of the simplicity of traditional ring designs (no in-ring buffering or buffered flow control) while achieving high scalability as more complex buffered hierarchical ring designs. Our design, called HiRD (Hierarchical Rings with Deflection), includes features that allow us to mostly maintain the simplicity of traditional simple ring topologies while providing higher energy efficiency and scalability. First, HiRD does not have any buffering or buffered flow control within individual rings, and requires only a small amount of buffering between the ring hierarchy levels. When inter-ring buffers are full, our design simply deflects flits so that they circle the ring and try again, which eliminates the need for in-ring buffering. Second, we introduce two simple mechanisms that provides an end-to-end delivery guarantee within the entire network without impacting the critical path or latency of the vast majority of network traffic. HiRD attains equal or better performance at better energy efficiency than multiple versions of both a previous hierarchical ring design and a traditional single ring design. We also analyze our design's characteristics and injection and delivery guarantees. We conclude that HiRD can be a compelling design point that allows higher energy efficiency and scalability while retaining the simplicity and appeal of conventional ring-based designs.</description><subject>Buffers</subject><subject>Communications traffic</subject><subject>Critical path</subject><subject>Deflection</subject><subject>Energy efficiency</subject><subject>Flow control</subject><subject>Power efficiency</subject><subject>Rings (mathematics)</subject><subject>Topology</subject><issn>2331-8422</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>ABUWG</sourceid><sourceid>AFKRA</sourceid><sourceid>AZQEC</sourceid><sourceid>BENPR</sourceid><sourceid>CCPQU</sourceid><sourceid>DWQXO</sourceid><recordid>eNqNjc1qwzAQhEWgkNDmHRZyNshyE_saHAffWkLvQVVW9gZ7lUhWSu598Ko_D9DTwHwfMzOxUEWRZ9WzUnOxDOEspVSbUq3XxUJ8bk1PeCPu4N1NPbTU9dAw-u4OjbVkCNncQfPpF72it86Pmg0CMbxwVvd0gdqNY2QyeiLHEMP3XkvotU_zRg9wSE2AD0oXO7QDmh_x4OKUwJN4sHoIuPzLR7HaN291m128u0YM0_HsoueEjkqWVa5KWeXF_6wvEZ1RtA</recordid><startdate>20160218</startdate><enddate>20160218</enddate><creator>Ausavarungnirun, Rachata</creator><creator>Fallin, Chris</creator><creator>Yu, Xiangyao</creator><creator>Chang, Kevin Kai-Wei</creator><creator>Nazario, Greg</creator><creator>Das, Reetuparna</creator><creator>Loh, Gabriel H</creator><creator>Mutlu, Onur</creator><general>Cornell University Library, arXiv.org</general><scope>8FE</scope><scope>8FG</scope><scope>ABJCF</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>DWQXO</scope><scope>HCIFZ</scope><scope>L6V</scope><scope>M7S</scope><scope>PIMPY</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PRINS</scope><scope>PTHSS</scope></search><sort><creationdate>20160218</creationdate><title>Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing</title><author>Ausavarungnirun, Rachata ; Fallin, Chris ; Yu, Xiangyao ; Chang, Kevin Kai-Wei ; Nazario, Greg ; Das, Reetuparna ; Loh, Gabriel H ; Mutlu, Onur</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-proquest_journals_20781270813</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Buffers</topic><topic>Communications traffic</topic><topic>Critical path</topic><topic>Deflection</topic><topic>Energy efficiency</topic><topic>Flow control</topic><topic>Power efficiency</topic><topic>Rings (mathematics)</topic><topic>Topology</topic><toplevel>online_resources</toplevel><creatorcontrib>Ausavarungnirun, Rachata</creatorcontrib><creatorcontrib>Fallin, Chris</creatorcontrib><creatorcontrib>Yu, Xiangyao</creatorcontrib><creatorcontrib>Chang, Kevin Kai-Wei</creatorcontrib><creatorcontrib>Nazario, Greg</creatorcontrib><creatorcontrib>Das, Reetuparna</creatorcontrib><creatorcontrib>Loh, Gabriel H</creatorcontrib><creatorcontrib>Mutlu, Onur</creatorcontrib><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>Materials Science &amp; Engineering Collection</collection><collection>ProQuest Central (Alumni Edition)</collection><collection>ProQuest Central UK/Ireland</collection><collection>ProQuest Central Essentials</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Central Korea</collection><collection>SciTech Premium Collection</collection><collection>ProQuest Engineering Collection</collection><collection>Engineering Database</collection><collection>Publicly Available Content Database</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><collection>ProQuest Central China</collection><collection>Engineering Collection</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Ausavarungnirun, Rachata</au><au>Fallin, Chris</au><au>Yu, Xiangyao</au><au>Chang, Kevin Kai-Wei</au><au>Nazario, Greg</au><au>Das, Reetuparna</au><au>Loh, Gabriel H</au><au>Mutlu, Onur</au><format>book</format><genre>document</genre><ristype>GEN</ristype><atitle>Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing</atitle><jtitle>arXiv.org</jtitle><date>2016-02-18</date><risdate>2016</risdate><eissn>2331-8422</eissn><abstract>Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice some of the key benefits of rings by introducing more complex in-ring buffering and buffered flow control. Our goal in this paper is to design a new hierarchical ring interconnect that can maintain most of the simplicity of traditional ring designs (no in-ring buffering or buffered flow control) while achieving high scalability as more complex buffered hierarchical ring designs. Our design, called HiRD (Hierarchical Rings with Deflection), includes features that allow us to mostly maintain the simplicity of traditional simple ring topologies while providing higher energy efficiency and scalability. First, HiRD does not have any buffering or buffered flow control within individual rings, and requires only a small amount of buffering between the ring hierarchy levels. When inter-ring buffers are full, our design simply deflects flits so that they circle the ring and try again, which eliminates the need for in-ring buffering. Second, we introduce two simple mechanisms that provides an end-to-end delivery guarantee within the entire network without impacting the critical path or latency of the vast majority of network traffic. HiRD attains equal or better performance at better energy efficiency than multiple versions of both a previous hierarchical ring design and a traditional single ring design. We also analyze our design's characteristics and injection and delivery guarantees. We conclude that HiRD can be a compelling design point that allows higher energy efficiency and scalability while retaining the simplicity and appeal of conventional ring-based designs.</abstract><cop>Ithaca</cop><pub>Cornell University Library, arXiv.org</pub><oa>free_for_read</oa></addata></record>
fulltext fulltext
identifier EISSN: 2331-8422
ispartof arXiv.org, 2016-02
issn 2331-8422
language eng
recordid cdi_proquest_journals_2078127081
source Freely Accessible Journals
subjects Buffers
Communications traffic
Critical path
Deflection
Energy efficiency
Flow control
Power efficiency
Rings (mathematics)
Topology
title Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T07%3A58%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=document&rft.atitle=Achieving%20both%20High%20Energy%20Efficiency%20and%20High%20Performance%20in%20On-Chip%20Communication%20using%20Hierarchical%20Rings%20with%20Deflection%20Routing&rft.jtitle=arXiv.org&rft.au=Ausavarungnirun,%20Rachata&rft.date=2016-02-18&rft.eissn=2331-8422&rft_id=info:doi/&rft_dat=%3Cproquest%3E2078127081%3C/proquest%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2078127081&rft_id=info:pmid/&rfr_iscdi=true