46‐4: 513‐ppi Hybrid Display with Stacked Transistors
A process for stacking two layers of transistors is used to form a high‐resolution hybrid display with improved reliability of an organic light‐emitting diode. Sufficient visibility and low power consumption are achieved by changing the display mode in accordance with ambient luminance.
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Veröffentlicht in: | SID International Symposium Digest of technical papers 2018-05, Vol.49 (1), p.617-620 |
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container_title | SID International Symposium Digest of technical papers |
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creator | Mori, Hidenori Shima, Yukinori Hosaka, Yasuharu Okazaki, Kenichi Kusunoki, Koji Shishido, Hideaki Hatsumi, Ryo Yoshitomi, Shuhei Yamazaki, Shunpei |
description | A process for stacking two layers of transistors is used to form a high‐resolution hybrid display with improved reliability of an organic light‐emitting diode. Sufficient visibility and low power consumption are achieved by changing the display mode in accordance with ambient luminance. |
doi_str_mv | 10.1002/sdtp.12406 |
format | Article |
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source | Wiley Online Library Journals Frontfile Complete |
subjects | CAAC-OS Diodes hybrid display LCD low power consumption OLED Power consumption Semiconductor devices stacked transistor Transistors Visibility |
title | 46‐4: 513‐ppi Hybrid Display with Stacked Transistors |
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