A Low-Power Radiation-Hardened Flip-Flop with Stacked Transistors in a 65 nm FDSOI Process

We propose a radiation-hardened Flip-Flop (FF) with stacked transistors based on the Adaptive Coupling Flip-Flop (ACFF) with low power consumption in a 65 nm FDSOI process. The slave latch in ACFF is much weaker against soft errors than the master latch. We design several FFs with stacked transistor...

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Veröffentlicht in:IEICE Transactions on Electronics 2018/04/01, Vol.E101.C(4), pp.273-280
Hauptverfasser: MARUOKA, Haruki, HIFUMI, Masashi, FURUTA, Jun, KOBAYASHI, Kazutoshi
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Sprache:eng
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