Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs

Due to the increasing diversity and complexity of embedded systems, the use of high-level synthesis (HLS) and that of FPGAs have been both becoming prevalent in order to enhance the design productivity. Although a number of works for FPGA-oriented optimizations, particularly about resource binding,...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	IPSJ Transactions on System LSI Design Methodology 2014, Vol.7, pp.37-45
Hauptverfasser:	Hara-Azumi, Yuko, Matsuba, Toshinobu, Tomiyama, Hiroyuki, Honda, Shinya, Takada, Hiroaki
Format:	Artikel
Sprache:	eng
Schlagworte:	Embedded systems Field programmable gate arrays FPGA High level synthesis register retiming resource sharing
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!