P4-To-VHDL: Automatic generation of high-speed input and output network blocks

•Automatic generation of parser and deparser blocks capable to process traffic at speed of 100 Gbps.•Protocol independent (can be used not only in computer networks).•Easy implementation of the final application because both modules (parser and deparser) are generated from abstract description from...

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Bibliographische Detailangaben

Veröffentlicht in:	Microprocessors and microsystems 2018-02, Vol.56, p.22-33
Hauptverfasser:	Benáček, Pavel, Puš, Viktor, Kubátová, Hana, Čejka, Tomáš
Format:	Artikel
Sprache:	eng
Schlagworte:	100 Gbps Data processing Deparser Electronic devices Field programmable gate arrays FPGA Gate arrays Hardware description languages High level synthesis High speed High-level language Level (quantity) Parser Protocol Studies
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