Multiple histogram-based face recognition with high speed FPGA implementation
Face recognition is an algorithm that is capable of identifying or verifying a query face from multiple faces in the enrollment database. It poses a challenging problem in the field of image analysis and computer vision, especially for applications that deal with video sequences, face re-identificat...
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creator | Bonny, Talal Rabie, Tamer Hafez, A. H. Abdul |
description | Face recognition is an algorithm that is capable of identifying or verifying a query face from multiple faces in the enrollment database. It poses a challenging problem in the field of image analysis and computer vision, especially for applications that deal with video sequences, face re-identification, or operate on intensity images and require fast processing. In this work, we introduce a high speed face recognition technique along with a high speed FPGA implementation. It uses a new similarity measure to estimate the distance between the query face and each of the database face images. The distance metric is the sum of the standard deviations between multiple histograms, which are calculated from each row of the query and database images. The lowest distance score refers to the database face that matches the query. The proposed technique is independent from the ambient illumination and outperforms the well-known face recognition algorithm “Eigenfaces” (it performs the face recognition 16× faster when both algorithms run on the same platform). Furthermore, we exploit data parallelism in our proposed algorithm to design a hardware accelerator and to implement it on an FPGA prototyping board. The results show 10x execution time improvement in comparison to the software version. |
doi_str_mv | 10.1007/s11042-018-5647-8 |
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The lowest distance score refers to the database face that matches the query. The proposed technique is independent from the ambient illumination and outperforms the well-known face recognition algorithm “Eigenfaces” (it performs the face recognition 16× faster when both algorithms run on the same platform). Furthermore, we exploit data parallelism in our proposed algorithm to design a hardware accelerator and to implement it on an FPGA prototyping board. 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Abdul</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c316t-5dd4770e417ea3e9f262c9017c7ff032a4ebd3ff3bfa327cd62505c45f67c75c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>Algorithms</topic><topic>Computer Communication Networks</topic><topic>Computer Science</topic><topic>Computer vision</topic><topic>Data Structures and Information Theory</topic><topic>Face</topic><topic>Face recognition</topic><topic>Facial recognition technology</topic><topic>Field programmable gate arrays</topic><topic>High speed</topic><topic>Histograms</topic><topic>Identification methods</topic><topic>Image analysis</topic><topic>Multimedia Information Systems</topic><topic>Program verification (computers)</topic><topic>Prototyping</topic><topic>Queries</topic><topic>Special Purpose and Application-Based Systems</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Bonny, Talal</creatorcontrib><creatorcontrib>Rabie, Tamer</creatorcontrib><creatorcontrib>Hafez, A. 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subjects | Algorithms Computer Communication Networks Computer Science Computer vision Data Structures and Information Theory Face Face recognition Facial recognition technology Field programmable gate arrays High speed Histograms Identification methods Image analysis Multimedia Information Systems Program verification (computers) Prototyping Queries Special Purpose and Application-Based Systems |
title | Multiple histogram-based face recognition with high speed FPGA implementation |
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