POD: A 3D-Integrated Broad-Purpose Acceleration Layer

To build a future many-core processor, industry must address the challenges of energy consumption and performance scalability. A 3D-integrated broad-purpose accelerator architecture called parallel-on-demand (POD) integrates a specialized SIMD-based die layer on top of a CISC superscalar processor t...

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Veröffentlicht in:	IEEE MICRO 2008-07, Vol.28 (4), p.28-40
Hauptverfasser:	Dong Hyuk Woo, Lee, H.-H.S., Fryman, J.B., Knies, A.D., Eng, M.
Format:	Artikel
Sprache:	eng
Schlagworte:	3-D graphics Acceleration Accelerator architectures Accelerator boards Accelerators Application virtualization Architecture Broadcasting Computer architecture Construction Energy consumption Extensibility Microprocessors Multicore processing Multiprocessing Packaging Process design Scalability Transistors
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