Flexible VLSI architectures for Galois field multipliers

Galois field (GF) multipliers play a major role in the engineering applications such as cryptography and error correcting codes. This paper proposes systolic vector m-bit GF(p) and GF(2m) multipliers (m=log2p), where four numbers of m2-bit GF multiplications can be done in parallel. Similarly, twelv...

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Veröffentlicht in:	Integration (Amsterdam) 2017-09, Vol.59, p.109-124
Hauptverfasser:	Basiri M, Mohamed Asan, Shukla, Sandeep K.
Format:	Artikel
Sprache:	eng
Schlagworte:	CMOS Cryptography ECC Error correcting codes Error correction Error correction & detection Galois field multiplier Integrated circuits Modular arithmetic Montgomery multiplication Multipliers Studies Vector processors Very large scale integration
Online-Zugang:	Volltext
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