Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding

Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances...

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Veröffentlicht in:Computational mathematics and modeling 2017-07, Vol.28 (3), p.400-406
Hauptverfasser: Gavrilov, S. V., Gurov, S. I., Zhukova, T. D., Rukhlov, V. S., Ryzhova, D. I., Tel’pukhov, D. V.
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container_end_page 406
container_issue 3
container_start_page 400
container_title Computational mathematics and modeling
container_volume 28
creator Gavrilov, S. V.
Gurov, S. I.
Zhukova, T. D.
Rukhlov, V. S.
Ryzhova, D. I.
Tel’pukhov, D. V.
description Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances: radiation, supply voltage jumps, signal degradation over time, etc. Investigations show that the probability of an error due to these factors may vary between very wide limits: from less than 0.1% for large circuits and up to 30% for very small circuits. In this article, we consider various methods of enhancing the fault tolerance of combinational circuits and also assess the effect of a single fault and a stuck-at fault on circuit operation for the case of combinational circuits from the ISCAS’85 set.
doi_str_mv 10.1007/s10598-017-9372-3
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fullrecord <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_1916794961</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>1916794961</sourcerecordid><originalsourceid>FETCH-LOGICAL-c2313-4bac7ca60488e4e586db152167d388828cba91867f373c1d5e590a0be1a1e81c3</originalsourceid><addsrcrecordid>eNp1kEFLwzAYhoMoOKc_wFvAczVf0zbpUYbTwYYgE3YLafJ1dmzNTNLD_r0Z9eDF0_cd3ufl5SHkHtgjMCaeArCylhkDkdVc5Bm_IBMoBc8kF5vL9LOiynLJN9fkJoQdY0zmnE1Is8L45Wyg0dFFbzzqgHSuh32ka7dHr3uD1LV05g5N1-vYuV7vUzLi1uuIlq46453pvBm6GGhzoh9oh94m7pQg2_XbW3LV6n3Au987JZ_zl_XsLVu-vy5mz8vM5Bx4VjTaCKMrVkiJBZaysg2UOVTCcillLk2ja5CVaLngBmyJZc00axA0oATDp-Rh7D169z1giGrnBp_mBgV1qqmLuoKUgjGVZofgsVVH3x20Pylg6qxSjSpVUqnOKhVPTD4yIWX7Lfo_zf9CP5radvo</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1916794961</pqid></control><display><type>article</type><title>Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding</title><source>SpringerLink Journals - AutoHoldings</source><creator>Gavrilov, S. V. ; Gurov, S. I. ; Zhukova, T. D. ; Rukhlov, V. S. ; Ryzhova, D. I. ; Tel’pukhov, D. V.</creator><creatorcontrib>Gavrilov, S. V. ; Gurov, S. I. ; Zhukova, T. D. ; Rukhlov, V. S. ; Ryzhova, D. I. ; Tel’pukhov, D. V.</creatorcontrib><description>Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances: radiation, supply voltage jumps, signal degradation over time, etc. Investigations show that the probability of an error due to these factors may vary between very wide limits: from less than 0.1% for large circuits and up to 30% for very small circuits. In this article, we consider various methods of enhancing the fault tolerance of combinational circuits and also assess the effect of a single fault and a stuck-at fault on circuit operation for the case of combinational circuits from the ISCAS’85 set.</description><identifier>ISSN: 1046-283X</identifier><identifier>EISSN: 1573-837X</identifier><identifier>DOI: 10.1007/s10598-017-9372-3</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>Applications of Mathematics ; Computational Mathematics and Numerical Analysis ; Electric potential ; Error analysis ; Fault tolerance ; Faults ; Integrated circuits ; Malfunctions ; Mathematical Modeling and Industrial Mathematics ; Mathematics ; Mathematics and Statistics ; Optimization ; Redundancy ; Reliability</subject><ispartof>Computational mathematics and modeling, 2017-07, Vol.28 (3), p.400-406</ispartof><rights>Springer Science+Business Media, LLC 2017</rights><rights>Copyright Springer Science &amp; Business Media 2017</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c2313-4bac7ca60488e4e586db152167d388828cba91867f373c1d5e590a0be1a1e81c3</citedby><cites>FETCH-LOGICAL-c2313-4bac7ca60488e4e586db152167d388828cba91867f373c1d5e590a0be1a1e81c3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s10598-017-9372-3$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/s10598-017-9372-3$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>314,776,780,27901,27902,41464,42533,51294</link.rule.ids></links><search><creatorcontrib>Gavrilov, S. V.</creatorcontrib><creatorcontrib>Gurov, S. I.</creatorcontrib><creatorcontrib>Zhukova, T. D.</creatorcontrib><creatorcontrib>Rukhlov, V. S.</creatorcontrib><creatorcontrib>Ryzhova, D. I.</creatorcontrib><creatorcontrib>Tel’pukhov, D. V.</creatorcontrib><title>Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding</title><title>Computational mathematics and modeling</title><addtitle>Comput Math Model</addtitle><description>Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances: radiation, supply voltage jumps, signal degradation over time, etc. Investigations show that the probability of an error due to these factors may vary between very wide limits: from less than 0.1% for large circuits and up to 30% for very small circuits. In this article, we consider various methods of enhancing the fault tolerance of combinational circuits and also assess the effect of a single fault and a stuck-at fault on circuit operation for the case of combinational circuits from the ISCAS’85 set.</description><subject>Applications of Mathematics</subject><subject>Computational Mathematics and Numerical Analysis</subject><subject>Electric potential</subject><subject>Error analysis</subject><subject>Fault tolerance</subject><subject>Faults</subject><subject>Integrated circuits</subject><subject>Malfunctions</subject><subject>Mathematical Modeling and Industrial Mathematics</subject><subject>Mathematics</subject><subject>Mathematics and Statistics</subject><subject>Optimization</subject><subject>Redundancy</subject><subject>Reliability</subject><issn>1046-283X</issn><issn>1573-837X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2017</creationdate><recordtype>article</recordtype><recordid>eNp1kEFLwzAYhoMoOKc_wFvAczVf0zbpUYbTwYYgE3YLafJ1dmzNTNLD_r0Z9eDF0_cd3ufl5SHkHtgjMCaeArCylhkDkdVc5Bm_IBMoBc8kF5vL9LOiynLJN9fkJoQdY0zmnE1Is8L45Wyg0dFFbzzqgHSuh32ka7dHr3uD1LV05g5N1-vYuV7vUzLi1uuIlq46453pvBm6GGhzoh9oh94m7pQg2_XbW3LV6n3Au987JZ_zl_XsLVu-vy5mz8vM5Bx4VjTaCKMrVkiJBZaysg2UOVTCcillLk2ja5CVaLngBmyJZc00axA0oATDp-Rh7D169z1giGrnBp_mBgV1qqmLuoKUgjGVZofgsVVH3x20Pylg6qxSjSpVUqnOKhVPTD4yIWX7Lfo_zf9CP5radvo</recordid><startdate>20170701</startdate><enddate>20170701</enddate><creator>Gavrilov, S. V.</creator><creator>Gurov, S. I.</creator><creator>Zhukova, T. D.</creator><creator>Rukhlov, V. S.</creator><creator>Ryzhova, D. I.</creator><creator>Tel’pukhov, D. V.</creator><general>Springer US</general><general>Springer Nature B.V</general><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20170701</creationdate><title>Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding</title><author>Gavrilov, S. V. ; Gurov, S. I. ; Zhukova, T. D. ; Rukhlov, V. S. ; Ryzhova, D. I. ; Tel’pukhov, D. V.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2313-4bac7ca60488e4e586db152167d388828cba91867f373c1d5e590a0be1a1e81c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><topic>Applications of Mathematics</topic><topic>Computational Mathematics and Numerical Analysis</topic><topic>Electric potential</topic><topic>Error analysis</topic><topic>Fault tolerance</topic><topic>Faults</topic><topic>Integrated circuits</topic><topic>Malfunctions</topic><topic>Mathematical Modeling and Industrial Mathematics</topic><topic>Mathematics</topic><topic>Mathematics and Statistics</topic><topic>Optimization</topic><topic>Redundancy</topic><topic>Reliability</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Gavrilov, S. V.</creatorcontrib><creatorcontrib>Gurov, S. I.</creatorcontrib><creatorcontrib>Zhukova, T. D.</creatorcontrib><creatorcontrib>Rukhlov, V. S.</creatorcontrib><creatorcontrib>Ryzhova, D. I.</creatorcontrib><creatorcontrib>Tel’pukhov, D. V.</creatorcontrib><collection>CrossRef</collection><jtitle>Computational mathematics and modeling</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Gavrilov, S. V.</au><au>Gurov, S. I.</au><au>Zhukova, T. D.</au><au>Rukhlov, V. S.</au><au>Ryzhova, D. I.</au><au>Tel’pukhov, D. V.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding</atitle><jtitle>Computational mathematics and modeling</jtitle><stitle>Comput Math Model</stitle><date>2017-07-01</date><risdate>2017</risdate><volume>28</volume><issue>3</issue><spage>400</spage><epage>406</epage><pages>400-406</pages><issn>1046-283X</issn><eissn>1573-837X</eissn><abstract>Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances: radiation, supply voltage jumps, signal degradation over time, etc. Investigations show that the probability of an error due to these factors may vary between very wide limits: from less than 0.1% for large circuits and up to 30% for very small circuits. In this article, we consider various methods of enhancing the fault tolerance of combinational circuits and also assess the effect of a single fault and a stuck-at fault on circuit operation for the case of combinational circuits from the ISCAS’85 set.</abstract><cop>New York</cop><pub>Springer US</pub><doi>10.1007/s10598-017-9372-3</doi><tpages>7</tpages></addata></record>
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subjects Applications of Mathematics
Computational Mathematics and Numerical Analysis
Electric potential
Error analysis
Fault tolerance
Faults
Integrated circuits
Malfunctions
Mathematical Modeling and Industrial Mathematics
Mathematics
Mathematics and Statistics
Optimization
Redundancy
Reliability
title Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T04%3A07%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Methods%20to%20Increase%20Fault%20Tolerance%20of%20Combinational%20Integrated%20Microcircuits%20by%20Redundancy%20Coding&rft.jtitle=Computational%20mathematics%20and%20modeling&rft.au=Gavrilov,%20S.%20V.&rft.date=2017-07-01&rft.volume=28&rft.issue=3&rft.spage=400&rft.epage=406&rft.pages=400-406&rft.issn=1046-283X&rft.eissn=1573-837X&rft_id=info:doi/10.1007/s10598-017-9372-3&rft_dat=%3Cproquest_cross%3E1916794961%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1916794961&rft_id=info:pmid/&rfr_iscdi=true