DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers

In this paper, a low overhead phase noise cancellation technique for ring oscillator (RO)-based quadrature receivers is presented. The proposed technique operates in background and extracts RO phase noise as well as supply-induced phase noise from the digital phase-locked loop. The obtained phase no...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE journal of solid-state circuits 2017-04, Vol.52 (4), p.1134-1143
Hauptverfasser: Zuow-Zun Chen, Yen-Cheng Kuan, Yilei Li, Boyu Hu, Chien-Heng Wong, Chang, Mau-Chung Frank
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 1143
container_issue 4
container_start_page 1134
container_title IEEE journal of solid-state circuits
container_volume 52
creator Zuow-Zun Chen
Yen-Cheng Kuan
Yilei Li
Boyu Hu
Chien-Heng Wong
Chang, Mau-Chung Frank
description In this paper, a low overhead phase noise cancellation technique for ring oscillator (RO)-based quadrature receivers is presented. The proposed technique operates in background and extracts RO phase noise as well as supply-induced phase noise from the digital phase-locked loop. The obtained phase noise information is then used to restore the randomly rotated baseband signal in digital domain. A receiver prototype is fabricated in standard 65-nm CMOS technology. It demonstrates a phase noise reduction from -88 to -109 dBc/Hz at 1-MHz offset and an integrated phase noise reduction from -16.8 to -34.6 dBc when operating at 2.4 GHz.
doi_str_mv 10.1109/JSSC.2017.2647925
format Article
fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_1883355724</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7862146</ieee_id><sourcerecordid>1883355724</sourcerecordid><originalsourceid>FETCH-LOGICAL-c293t-94ce92f0dc1b4c84613148f40bcc5506437081aaa661917967be92070c1eb50f3</originalsourceid><addsrcrecordid>eNo9kE1LAzEQhoMoWKs_QLwEPG_N5HuPun5TbG0VvIVsmtWUuqvJruC_d5cWLzPM8Lwz8CB0CmQCQPKLx-WymFACakIlVzkVe2gEQugMFHvbRyNCQGc5JeQQHaW07kfONYzQ7Ho-neKqiXj-YZPHT03oa2Fr5zcb24amxqHGi1C_41lyYdg1Mbvq0RV-7uwq2raLHi-88-HHx3SMDiq7Sf5k18fo9fbmpbjPprO7h-JymjmaszbLufM5rcjKQcmd5hIYcF1xUjonBJGcKaLBWisl5KByqcqeJ4o48KUgFRuj8-3dr9h8dz61Zt10se5fGtCaMSEU5T0FW8rFJqXoK_MVw6eNvwaIGbyZwZsZvJmdtz5zts0E7_0_r7SkwCX7A1qyZ5k</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1883355724</pqid></control><display><type>article</type><title>DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers</title><source>IEEE Electronic Library (IEL)</source><creator>Zuow-Zun Chen ; Yen-Cheng Kuan ; Yilei Li ; Boyu Hu ; Chien-Heng Wong ; Chang, Mau-Chung Frank</creator><creatorcontrib>Zuow-Zun Chen ; Yen-Cheng Kuan ; Yilei Li ; Boyu Hu ; Chien-Heng Wong ; Chang, Mau-Chung Frank</creatorcontrib><description>In this paper, a low overhead phase noise cancellation technique for ring oscillator (RO)-based quadrature receivers is presented. The proposed technique operates in background and extracts RO phase noise as well as supply-induced phase noise from the digital phase-locked loop. The obtained phase noise information is then used to restore the randomly rotated baseband signal in digital domain. A receiver prototype is fabricated in standard 65-nm CMOS technology. It demonstrates a phase noise reduction from -88 to -109 dBc/Hz at 1-MHz offset and an integrated phase noise reduction from -16.8 to -34.6 dBc when operating at 2.4 GHz.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2017.2647925</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Background noise ; Baseband ; CMOS ; Digital phase-locked loop (DPLL) ; Digital technology ; frequency synthesizer ; Microwave communications ; Noise ; Noise reduction ; Phase locked loops ; Phase noise ; phase noise cancellation ; Quantization (signal) ; radio receiver ; Receivers ; ring oscillator (RO) ; sub-sampling time-to-digital converter (TDC) ; Test methods ; Transfer functions</subject><ispartof>IEEE journal of solid-state circuits, 2017-04, Vol.52 (4), p.1134-1143</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2017</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-94ce92f0dc1b4c84613148f40bcc5506437081aaa661917967be92070c1eb50f3</citedby><cites>FETCH-LOGICAL-c293t-94ce92f0dc1b4c84613148f40bcc5506437081aaa661917967be92070c1eb50f3</cites><orcidid>0000-0003-1948-305X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7862146$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7862146$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Zuow-Zun Chen</creatorcontrib><creatorcontrib>Yen-Cheng Kuan</creatorcontrib><creatorcontrib>Yilei Li</creatorcontrib><creatorcontrib>Boyu Hu</creatorcontrib><creatorcontrib>Chien-Heng Wong</creatorcontrib><creatorcontrib>Chang, Mau-Chung Frank</creatorcontrib><title>DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>In this paper, a low overhead phase noise cancellation technique for ring oscillator (RO)-based quadrature receivers is presented. The proposed technique operates in background and extracts RO phase noise as well as supply-induced phase noise from the digital phase-locked loop. The obtained phase noise information is then used to restore the randomly rotated baseband signal in digital domain. A receiver prototype is fabricated in standard 65-nm CMOS technology. It demonstrates a phase noise reduction from -88 to -109 dBc/Hz at 1-MHz offset and an integrated phase noise reduction from -16.8 to -34.6 dBc when operating at 2.4 GHz.</description><subject>Background noise</subject><subject>Baseband</subject><subject>CMOS</subject><subject>Digital phase-locked loop (DPLL)</subject><subject>Digital technology</subject><subject>frequency synthesizer</subject><subject>Microwave communications</subject><subject>Noise</subject><subject>Noise reduction</subject><subject>Phase locked loops</subject><subject>Phase noise</subject><subject>phase noise cancellation</subject><subject>Quantization (signal)</subject><subject>radio receiver</subject><subject>Receivers</subject><subject>ring oscillator (RO)</subject><subject>sub-sampling time-to-digital converter (TDC)</subject><subject>Test methods</subject><subject>Transfer functions</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2017</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LAzEQhoMoWKs_QLwEPG_N5HuPun5TbG0VvIVsmtWUuqvJruC_d5cWLzPM8Lwz8CB0CmQCQPKLx-WymFACakIlVzkVe2gEQugMFHvbRyNCQGc5JeQQHaW07kfONYzQ7Ho-neKqiXj-YZPHT03oa2Fr5zcb24amxqHGi1C_41lyYdg1Mbvq0RV-7uwq2raLHi-88-HHx3SMDiq7Sf5k18fo9fbmpbjPprO7h-JymjmaszbLufM5rcjKQcmd5hIYcF1xUjonBJGcKaLBWisl5KByqcqeJ4o48KUgFRuj8-3dr9h8dz61Zt10se5fGtCaMSEU5T0FW8rFJqXoK_MVw6eNvwaIGbyZwZsZvJmdtz5zts0E7_0_r7SkwCX7A1qyZ5k</recordid><startdate>20170401</startdate><enddate>20170401</enddate><creator>Zuow-Zun Chen</creator><creator>Yen-Cheng Kuan</creator><creator>Yilei Li</creator><creator>Boyu Hu</creator><creator>Chien-Heng Wong</creator><creator>Chang, Mau-Chung Frank</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0003-1948-305X</orcidid></search><sort><creationdate>20170401</creationdate><title>DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers</title><author>Zuow-Zun Chen ; Yen-Cheng Kuan ; Yilei Li ; Boyu Hu ; Chien-Heng Wong ; Chang, Mau-Chung Frank</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c293t-94ce92f0dc1b4c84613148f40bcc5506437081aaa661917967be92070c1eb50f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><topic>Background noise</topic><topic>Baseband</topic><topic>CMOS</topic><topic>Digital phase-locked loop (DPLL)</topic><topic>Digital technology</topic><topic>frequency synthesizer</topic><topic>Microwave communications</topic><topic>Noise</topic><topic>Noise reduction</topic><topic>Phase locked loops</topic><topic>Phase noise</topic><topic>phase noise cancellation</topic><topic>Quantization (signal)</topic><topic>radio receiver</topic><topic>Receivers</topic><topic>ring oscillator (RO)</topic><topic>sub-sampling time-to-digital converter (TDC)</topic><topic>Test methods</topic><topic>Transfer functions</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Zuow-Zun Chen</creatorcontrib><creatorcontrib>Yen-Cheng Kuan</creatorcontrib><creatorcontrib>Yilei Li</creatorcontrib><creatorcontrib>Boyu Hu</creatorcontrib><creatorcontrib>Chien-Heng Wong</creatorcontrib><creatorcontrib>Chang, Mau-Chung Frank</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zuow-Zun Chen</au><au>Yen-Cheng Kuan</au><au>Yilei Li</au><au>Boyu Hu</au><au>Chien-Heng Wong</au><au>Chang, Mau-Chung Frank</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2017-04-01</date><risdate>2017</risdate><volume>52</volume><issue>4</issue><spage>1134</spage><epage>1143</epage><pages>1134-1143</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>In this paper, a low overhead phase noise cancellation technique for ring oscillator (RO)-based quadrature receivers is presented. The proposed technique operates in background and extracts RO phase noise as well as supply-induced phase noise from the digital phase-locked loop. The obtained phase noise information is then used to restore the randomly rotated baseband signal in digital domain. A receiver prototype is fabricated in standard 65-nm CMOS technology. It demonstrates a phase noise reduction from -88 to -109 dBc/Hz at 1-MHz offset and an integrated phase noise reduction from -16.8 to -34.6 dBc when operating at 2.4 GHz.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JSSC.2017.2647925</doi><tpages>10</tpages><orcidid>https://orcid.org/0000-0003-1948-305X</orcidid></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0018-9200
ispartof IEEE journal of solid-state circuits, 2017-04, Vol.52 (4), p.1134-1143
issn 0018-9200
1558-173X
language eng
recordid cdi_proquest_journals_1883355724
source IEEE Electronic Library (IEL)
subjects Background noise
Baseband
CMOS
Digital phase-locked loop (DPLL)
Digital technology
frequency synthesizer
Microwave communications
Noise
Noise reduction
Phase locked loops
Phase noise
phase noise cancellation
Quantization (signal)
radio receiver
Receivers
ring oscillator (RO)
sub-sampling time-to-digital converter (TDC)
Test methods
Transfer functions
title DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T18%3A54%3A14IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=DPLL%20for%20Phase%20Noise%20Cancellation%20in%20Ring%20Oscillator-Based%20Quadrature%20Receivers&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Zuow-Zun%20Chen&rft.date=2017-04-01&rft.volume=52&rft.issue=4&rft.spage=1134&rft.epage=1143&rft.pages=1134-1143&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/JSSC.2017.2647925&rft_dat=%3Cproquest_RIE%3E1883355724%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1883355724&rft_id=info:pmid/&rft_ieee_id=7862146&rfr_iscdi=true