A 25 Gb/s 1.13 pJ/b −10.8 dBm Input Sensitivity Optical Receiver in 40 nm CMOS

This paper describes the design of a 25 Gb/s energy-efficient CMOS optical receiver with high input sensitivity. By incorporating a current-boosting preamplifier with a dual-path time-interleaved integrating-type optical receiver, it provides 1:2 demultiplexing operation with a tolerance to lower ba...

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