Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm

Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm

A dual-mode digital power gate (PG) and linear low-drop-out regulator (LDO) has been demonstrated in 14 nm. A modified flipped source follower driver circuit is used to minimize dI/dt droops. The LDO has a novel compensation method which utilizes capacitance multiplication and can drive a 1-7 μF loa...

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Veröffentlicht in:IEEE journal of solid-state circuits 2016-03, Vol.51 (3), p.752-762
Hauptverfasser: Luria, Kosta, Shor, Joseph, Zelikson, Michael, Lyakhov, Alex
Format: Artikel
Sprache:eng
Schlagworte:
Analog
Capacitors
Gain
Logic gates
low-drop-out regulator (LDO)
microprocessors
power management
Program processors
Regulators
Transistors
Voltage measurement
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Beschreibung
Zusammenfassung:A dual-mode digital power gate (PG) and linear low-drop-out regulator (LDO) has been demonstrated in 14 nm. A modified flipped source follower driver circuit is used to minimize dI/dt droops. The LDO has a novel compensation method which utilizes capacitance multiplication and can drive a 1-7 μF load without any external compensation elements. This LDO exhibits high-current drive capability (3 A) at low-dropout voltages ( 99%), making it suitable to drive a microprocessor core.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2015.2512387