A Comparator-Based Rail Clamp
A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with littl...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2016-04, Vol.24 (4), p.1493-1502 |
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| container_title | IEEE transactions on very large scale integration (VLSI) systems |
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| creator | Venkatasubramanian, Ramachandran Oertle, Kent Ozev, Sule |
| description | A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4 μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented. |
| doi_str_mv | 10.1109/TVLSI.2015.2446460 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_1787007316</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7163348</ieee_id><sourcerecordid>4046067021</sourcerecordid><originalsourceid>FETCH-LOGICAL-c328t-27374ac633a3f5fa460bd4daaa8dfd13eef125c45c2a7b021afa3e97eb5b9c983</originalsourceid><addsrcrecordid>eNpdkE1LAzEQhoMoWKt_QBEKXrxszeRjkz3WxY9CQdDqNcxmE9iy212T9uC_b2qLB-cyc3jed2ZeQq6BTgFo8bD8WnzMp4yCnDIhcpHTEzICKVVWpDpNM815phnQc3IR44pSEKKgI3I7m5R9N2DATR-yR4yunrxj007KFrvhkpx5bKO7OvYx-Xx-Wpav2eLtZV7OFpnlTG8yprgSaHPOkXvpMa2valEjoq59Ddw5D0xaIS1DVVEG6JG7QrlKVoUtNB-T-4PvEPrvrYsb0zXRurbFteu30YCGPD3AYY_e_UNX_Tas03UGlFaUKg55otiBsqGPMThvhtB0GH4MULNPzPwmZvaJmWNiSXRzEDXOuT-BSnZcaL4D9xBlIA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1787007316</pqid></control><display><type>article</type><title>A Comparator-Based Rail Clamp</title><source>IEEE Electronic Library (IEL)</source><creator>Venkatasubramanian, Ramachandran ; Oertle, Kent ; Ozev, Sule</creator><creatorcontrib>Venkatasubramanian, Ramachandran ; Oertle, Kent ; Ozev, Sule</creatorcontrib><description>A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4 μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2015.2446460</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Capacitors ; Circuits ; Clamps ; CMOS integrated circuits ; Design engineering ; Dissipation ; electrostatic discharge (ESD) ; Electrostatic discharges ; ESD protection design ; Inverters ; rail clamp ; Rails ; Residual energy ; Resistors ; Transistors ; Very large scale integration</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 2016-04, Vol.24 (4), p.1493-1502</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c328t-27374ac633a3f5fa460bd4daaa8dfd13eef125c45c2a7b021afa3e97eb5b9c983</citedby><cites>FETCH-LOGICAL-c328t-27374ac633a3f5fa460bd4daaa8dfd13eef125c45c2a7b021afa3e97eb5b9c983</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7163348$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7163348$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Venkatasubramanian, Ramachandran</creatorcontrib><creatorcontrib>Oertle, Kent</creatorcontrib><creatorcontrib>Ozev, Sule</creatorcontrib><title>A Comparator-Based Rail Clamp</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4 μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.</description><subject>Capacitors</subject><subject>Circuits</subject><subject>Clamps</subject><subject>CMOS integrated circuits</subject><subject>Design engineering</subject><subject>Dissipation</subject><subject>electrostatic discharge (ESD)</subject><subject>Electrostatic discharges</subject><subject>ESD protection design</subject><subject>Inverters</subject><subject>rail clamp</subject><subject>Rails</subject><subject>Residual energy</subject><subject>Resistors</subject><subject>Transistors</subject><subject>Very large scale integration</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1LAzEQhoMoWKt_QBEKXrxszeRjkz3WxY9CQdDqNcxmE9iy212T9uC_b2qLB-cyc3jed2ZeQq6BTgFo8bD8WnzMp4yCnDIhcpHTEzICKVVWpDpNM815phnQc3IR44pSEKKgI3I7m5R9N2DATR-yR4yunrxj007KFrvhkpx5bKO7OvYx-Xx-Wpav2eLtZV7OFpnlTG8yprgSaHPOkXvpMa2valEjoq59Ddw5D0xaIS1DVVEG6JG7QrlKVoUtNB-T-4PvEPrvrYsb0zXRurbFteu30YCGPD3AYY_e_UNX_Tas03UGlFaUKg55otiBsqGPMThvhtB0GH4MULNPzPwmZvaJmWNiSXRzEDXOuT-BSnZcaL4D9xBlIA</recordid><startdate>201604</startdate><enddate>201604</enddate><creator>Venkatasubramanian, Ramachandran</creator><creator>Oertle, Kent</creator><creator>Ozev, Sule</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>201604</creationdate><title>A Comparator-Based Rail Clamp</title><author>Venkatasubramanian, Ramachandran ; Oertle, Kent ; Ozev, Sule</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c328t-27374ac633a3f5fa460bd4daaa8dfd13eef125c45c2a7b021afa3e97eb5b9c983</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Capacitors</topic><topic>Circuits</topic><topic>Clamps</topic><topic>CMOS integrated circuits</topic><topic>Design engineering</topic><topic>Dissipation</topic><topic>electrostatic discharge (ESD)</topic><topic>Electrostatic discharges</topic><topic>ESD protection design</topic><topic>Inverters</topic><topic>rail clamp</topic><topic>Rails</topic><topic>Residual energy</topic><topic>Resistors</topic><topic>Transistors</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Venkatasubramanian, Ramachandran</creatorcontrib><creatorcontrib>Oertle, Kent</creatorcontrib><creatorcontrib>Ozev, Sule</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Venkatasubramanian, Ramachandran</au><au>Oertle, Kent</au><au>Ozev, Sule</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Comparator-Based Rail Clamp</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2016-04</date><risdate>2016</risdate><volume>24</volume><issue>4</issue><spage>1493</spage><epage>1502</epage><pages>1493-1502</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>A comparator-based rail clamp for handling electrostatic discharge (ESD) events is presented. The new circuit technique allows the use of a time constant that can be much smaller than a traditional RC and inverter-based clamp. The new clamp is more area-efficient and dissipates ESD events with little residual energy. The design is able to support applications with power-ON time slower than 4 μs, is immune to latch-ON, and recovers very quickly if falsely triggered. Experimental results and performance comparisons with the traditional circuit are presented.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TVLSI.2015.2446460</doi><tpages>10</tpages></addata></record> |
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| identifier | ISSN: 1063-8210 |
| ispartof | IEEE transactions on very large scale integration (VLSI) systems, 2016-04, Vol.24 (4), p.1493-1502 |
| issn | 1063-8210 1557-9999 |
| language | eng |
| recordid | cdi_proquest_journals_1787007316 |
| source | IEEE Electronic Library (IEL) |
| subjects | Capacitors Circuits Clamps CMOS integrated circuits Design engineering Dissipation electrostatic discharge (ESD) Electrostatic discharges ESD protection design Inverters rail clamp Rails Residual energy Resistors Transistors Very large scale integration |
| title | A Comparator-Based Rail Clamp |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T15%3A09%3A21IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Comparator-Based%20Rail%20Clamp&rft.jtitle=IEEE%20transactions%20on%20very%20large%20scale%20integration%20(VLSI)%20systems&rft.au=Venkatasubramanian,%20Ramachandran&rft.date=2016-04&rft.volume=24&rft.issue=4&rft.spage=1493&rft.epage=1502&rft.pages=1493-1502&rft.issn=1063-8210&rft.eissn=1557-9999&rft.coden=IEVSE9&rft_id=info:doi/10.1109/TVLSI.2015.2446460&rft_dat=%3Cproquest_RIE%3E4046067021%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1787007316&rft_id=info:pmid/&rft_ieee_id=7163348&rfr_iscdi=true |