Si and InGaAs Spatial Wavefunction-Switched (SWS) FETs with II–VI Gate Insulators: An Approach to the Design and Integration of Two-Bit SRAMs and Binary CMOS Logic
Electron wavefunctions are switched spatially from one quantum well to another by varying the gate voltage V g in spatial wavefunction-switched (SWS) field-effect transistors (FETs), which comprise two or more coupled quantum wells serving as the transport channel. This is shown for Si/SiGe and InGa...
Gespeichert in:
| Veröffentlicht in: | Journal of electronic materials 2015-09, Vol.44 (9), p.3108-3115 |
|---|---|
| Hauptverfasser: | , , , , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 3115 |
|---|---|
| container_issue | 9 |
| container_start_page | 3108 |
| container_title | Journal of electronic materials |
| container_volume | 44 |
| creator | Jain, F. Chan, P.-Y. Lingalugari, M. Kondo, J. Suarez, E. Gogna, P. Chandy, J. Heller, E. |
| description | Electron wavefunctions are switched spatially from one quantum well to another by varying the gate voltage
V
g
in spatial wavefunction-switched (SWS) field-effect transistors (FETs), which comprise two or more coupled quantum wells serving as the transport channel. This is shown for Si/SiGe and InGaAs/AlInAs quantum well systems. The presence of charge in a particular well or channel is used to encode four states 00, 01, 10, 11. This unique property is used for two-bit processing, resulting in compact two-bit static random-access memory devices. Experimental data including capacitance–voltage peaks in Si and InGaAs multiple quantum well SWS-FETs has verified the SWS phenomenon. Replacing quantum wells by an array of cladded quantum dots, forming a quantum dot superlattice (QDSL) layer, enhances the contrast and noise margin in SWS-FETs. This paper reports
I
–
V
and
C
–
V
characteristics for a fabricated twin-drain SWS-quantum dot channel (QDC) FET comprising four layers of self-assembled SiO
x
-Si quantum dots. SWS-QDC-FETs are shown to be scalable to ∼9 nm, and comprise four layers of cladded quantum dots with an array of 3 × 3 forming the channel. |
| doi_str_mv | 10.1007/s11664-015-3827-0 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_1706462089</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>3786851381</sourcerecordid><originalsourceid>FETCH-LOGICAL-c349t-84d1466a2d09f76621bc5a8046df98113690ae76dc1be5afacd57754daa6b4913</originalsourceid><addsrcrecordid>eNp1kcFuEzEQhi1EJULLA3AbiQscDJ5dr3eX2zZAWClVJbZQbpbj9Saugh1sh4ob78Az9MV4kjqkBy6cRhp9_z-_5ifkObLXyFj9JiIKwSnDipZNUVP2iMyw4iXFRnx9TGasFEiroqyekKcx3rAMYoMzcjdYUG6E3i1UF2HYqWTVFq7VDzPtnU7WOzrc2qQ3ZoSXw_XwCj68v4qQVxvo-z-_fn_pYaGSyQ5xv1XJh_gWOgfdbhe80htIHtLGwDsT7do93EpmHdTBG_wEV7eentsEw6fuIv4Fzq1T4SfMLy4HWPq11WfkZFLbaJ49zFPyOaeYf6TLy0U_75ZUl7xNtOEjciFUMbJ2qoUocKUr1TAuxqltEEvRMmVqMWpcmUpNSo9VXVd8VEqseIvlKXlx9M3Zv-9NTPLG74PLJyXWTHBRsKbNFB4pHXyMwUxyF-y3nFgik4c25LENmZ8sD21IljXFURMz69Ym_OP8X9E9EPCMPA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1706462089</pqid></control><display><type>article</type><title>Si and InGaAs Spatial Wavefunction-Switched (SWS) FETs with II–VI Gate Insulators: An Approach to the Design and Integration of Two-Bit SRAMs and Binary CMOS Logic</title><source>SpringerLink Journals - AutoHoldings</source><creator>Jain, F. ; Chan, P.-Y. ; Lingalugari, M. ; Kondo, J. ; Suarez, E. ; Gogna, P. ; Chandy, J. ; Heller, E.</creator><creatorcontrib>Jain, F. ; Chan, P.-Y. ; Lingalugari, M. ; Kondo, J. ; Suarez, E. ; Gogna, P. ; Chandy, J. ; Heller, E.</creatorcontrib><description>Electron wavefunctions are switched spatially from one quantum well to another by varying the gate voltage
V
g
in spatial wavefunction-switched (SWS) field-effect transistors (FETs), which comprise two or more coupled quantum wells serving as the transport channel. This is shown for Si/SiGe and InGaAs/AlInAs quantum well systems. The presence of charge in a particular well or channel is used to encode four states 00, 01, 10, 11. This unique property is used for two-bit processing, resulting in compact two-bit static random-access memory devices. Experimental data including capacitance–voltage peaks in Si and InGaAs multiple quantum well SWS-FETs has verified the SWS phenomenon. Replacing quantum wells by an array of cladded quantum dots, forming a quantum dot superlattice (QDSL) layer, enhances the contrast and noise margin in SWS-FETs. This paper reports
I
–
V
and
C
–
V
characteristics for a fabricated twin-drain SWS-quantum dot channel (QDC) FET comprising four layers of self-assembled SiO
x
-Si quantum dots. SWS-QDC-FETs are shown to be scalable to ∼9 nm, and comprise four layers of cladded quantum dots with an array of 3 × 3 forming the channel.</description><identifier>ISSN: 0361-5235</identifier><identifier>EISSN: 1543-186X</identifier><identifier>DOI: 10.1007/s11664-015-3827-0</identifier><identifier>CODEN: JECMA5</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>Characterization and Evaluation of Materials ; Chemistry and Materials Science ; CMOS ; Electronics and Microelectronics ; Instrumentation ; Materials Science ; Optical and Electronic Materials ; Random access memory ; Solid State Physics ; Transistors</subject><ispartof>Journal of electronic materials, 2015-09, Vol.44 (9), p.3108-3115</ispartof><rights>The Minerals, Metals & Materials Society 2015</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c349t-84d1466a2d09f76621bc5a8046df98113690ae76dc1be5afacd57754daa6b4913</citedby><cites>FETCH-LOGICAL-c349t-84d1466a2d09f76621bc5a8046df98113690ae76dc1be5afacd57754daa6b4913</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s11664-015-3827-0$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/s11664-015-3827-0$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>314,776,780,27901,27902,41464,42533,51294</link.rule.ids></links><search><creatorcontrib>Jain, F.</creatorcontrib><creatorcontrib>Chan, P.-Y.</creatorcontrib><creatorcontrib>Lingalugari, M.</creatorcontrib><creatorcontrib>Kondo, J.</creatorcontrib><creatorcontrib>Suarez, E.</creatorcontrib><creatorcontrib>Gogna, P.</creatorcontrib><creatorcontrib>Chandy, J.</creatorcontrib><creatorcontrib>Heller, E.</creatorcontrib><title>Si and InGaAs Spatial Wavefunction-Switched (SWS) FETs with II–VI Gate Insulators: An Approach to the Design and Integration of Two-Bit SRAMs and Binary CMOS Logic</title><title>Journal of electronic materials</title><addtitle>Journal of Elec Materi</addtitle><description>Electron wavefunctions are switched spatially from one quantum well to another by varying the gate voltage
V
g
in spatial wavefunction-switched (SWS) field-effect transistors (FETs), which comprise two or more coupled quantum wells serving as the transport channel. This is shown for Si/SiGe and InGaAs/AlInAs quantum well systems. The presence of charge in a particular well or channel is used to encode four states 00, 01, 10, 11. This unique property is used for two-bit processing, resulting in compact two-bit static random-access memory devices. Experimental data including capacitance–voltage peaks in Si and InGaAs multiple quantum well SWS-FETs has verified the SWS phenomenon. Replacing quantum wells by an array of cladded quantum dots, forming a quantum dot superlattice (QDSL) layer, enhances the contrast and noise margin in SWS-FETs. This paper reports
I
–
V
and
C
–
V
characteristics for a fabricated twin-drain SWS-quantum dot channel (QDC) FET comprising four layers of self-assembled SiO
x
-Si quantum dots. SWS-QDC-FETs are shown to be scalable to ∼9 nm, and comprise four layers of cladded quantum dots with an array of 3 × 3 forming the channel.</description><subject>Characterization and Evaluation of Materials</subject><subject>Chemistry and Materials Science</subject><subject>CMOS</subject><subject>Electronics and Microelectronics</subject><subject>Instrumentation</subject><subject>Materials Science</subject><subject>Optical and Electronic Materials</subject><subject>Random access memory</subject><subject>Solid State Physics</subject><subject>Transistors</subject><issn>0361-5235</issn><issn>1543-186X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>8G5</sourceid><sourceid>BENPR</sourceid><sourceid>GUQSH</sourceid><sourceid>M2O</sourceid><recordid>eNp1kcFuEzEQhi1EJULLA3AbiQscDJ5dr3eX2zZAWClVJbZQbpbj9Saugh1sh4ob78Az9MV4kjqkBy6cRhp9_z-_5ifkObLXyFj9JiIKwSnDipZNUVP2iMyw4iXFRnx9TGasFEiroqyekKcx3rAMYoMzcjdYUG6E3i1UF2HYqWTVFq7VDzPtnU7WOzrc2qQ3ZoSXw_XwCj68v4qQVxvo-z-_fn_pYaGSyQ5xv1XJh_gWOgfdbhe80htIHtLGwDsT7do93EpmHdTBG_wEV7eentsEw6fuIv4Fzq1T4SfMLy4HWPq11WfkZFLbaJ49zFPyOaeYf6TLy0U_75ZUl7xNtOEjciFUMbJ2qoUocKUr1TAuxqltEEvRMmVqMWpcmUpNSo9VXVd8VEqseIvlKXlx9M3Zv-9NTPLG74PLJyXWTHBRsKbNFB4pHXyMwUxyF-y3nFgik4c25LENmZ8sD21IljXFURMz69Ym_OP8X9E9EPCMPA</recordid><startdate>20150901</startdate><enddate>20150901</enddate><creator>Jain, F.</creator><creator>Chan, P.-Y.</creator><creator>Lingalugari, M.</creator><creator>Kondo, J.</creator><creator>Suarez, E.</creator><creator>Gogna, P.</creator><creator>Chandy, J.</creator><creator>Heller, E.</creator><general>Springer US</general><general>Springer Nature B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>3V.</scope><scope>7XB</scope><scope>88I</scope><scope>8AF</scope><scope>8AO</scope><scope>8FE</scope><scope>8FG</scope><scope>8FK</scope><scope>8G5</scope><scope>ABJCF</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>ARAPS</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>D1I</scope><scope>DWQXO</scope><scope>GNUQQ</scope><scope>GUQSH</scope><scope>HCIFZ</scope><scope>KB.</scope><scope>L6V</scope><scope>M2O</scope><scope>M2P</scope><scope>M7S</scope><scope>MBDVC</scope><scope>P5Z</scope><scope>P62</scope><scope>PDBOC</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PRINS</scope><scope>PTHSS</scope><scope>Q9U</scope><scope>S0X</scope></search><sort><creationdate>20150901</creationdate><title>Si and InGaAs Spatial Wavefunction-Switched (SWS) FETs with II–VI Gate Insulators: An Approach to the Design and Integration of Two-Bit SRAMs and Binary CMOS Logic</title><author>Jain, F. ; Chan, P.-Y. ; Lingalugari, M. ; Kondo, J. ; Suarez, E. ; Gogna, P. ; Chandy, J. ; Heller, E.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c349t-84d1466a2d09f76621bc5a8046df98113690ae76dc1be5afacd57754daa6b4913</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Characterization and Evaluation of Materials</topic><topic>Chemistry and Materials Science</topic><topic>CMOS</topic><topic>Electronics and Microelectronics</topic><topic>Instrumentation</topic><topic>Materials Science</topic><topic>Optical and Electronic Materials</topic><topic>Random access memory</topic><topic>Solid State Physics</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Jain, F.</creatorcontrib><creatorcontrib>Chan, P.-Y.</creatorcontrib><creatorcontrib>Lingalugari, M.</creatorcontrib><creatorcontrib>Kondo, J.</creatorcontrib><creatorcontrib>Suarez, E.</creatorcontrib><creatorcontrib>Gogna, P.</creatorcontrib><creatorcontrib>Chandy, J.</creatorcontrib><creatorcontrib>Heller, E.</creatorcontrib><collection>CrossRef</collection><collection>ProQuest Central (Corporate)</collection><collection>ProQuest Central (purchase pre-March 2016)</collection><collection>Science Database (Alumni Edition)</collection><collection>STEM Database</collection><collection>ProQuest Pharma Collection</collection><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>ProQuest Central (Alumni) (purchase pre-March 2016)</collection><collection>Research Library (Alumni Edition)</collection><collection>Materials Science & Engineering Collection</collection><collection>ProQuest Central (Alumni Edition)</collection><collection>ProQuest Central UK/Ireland</collection><collection>Advanced Technologies & Aerospace Collection</collection><collection>ProQuest Central Essentials</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Materials Science Collection</collection><collection>ProQuest Central Korea</collection><collection>ProQuest Central Student</collection><collection>Research Library Prep</collection><collection>SciTech Premium Collection</collection><collection>Materials Science Database</collection><collection>ProQuest Engineering Collection</collection><collection>Research Library</collection><collection>Science Database</collection><collection>Engineering Database</collection><collection>Research Library (Corporate)</collection><collection>Advanced Technologies & Aerospace Database</collection><collection>ProQuest Advanced Technologies & Aerospace Collection</collection><collection>Materials Science Collection</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><collection>ProQuest Central China</collection><collection>Engineering Collection</collection><collection>ProQuest Central Basic</collection><collection>SIRS Editorial</collection><jtitle>Journal of electronic materials</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Jain, F.</au><au>Chan, P.-Y.</au><au>Lingalugari, M.</au><au>Kondo, J.</au><au>Suarez, E.</au><au>Gogna, P.</au><au>Chandy, J.</au><au>Heller, E.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Si and InGaAs Spatial Wavefunction-Switched (SWS) FETs with II–VI Gate Insulators: An Approach to the Design and Integration of Two-Bit SRAMs and Binary CMOS Logic</atitle><jtitle>Journal of electronic materials</jtitle><stitle>Journal of Elec Materi</stitle><date>2015-09-01</date><risdate>2015</risdate><volume>44</volume><issue>9</issue><spage>3108</spage><epage>3115</epage><pages>3108-3115</pages><issn>0361-5235</issn><eissn>1543-186X</eissn><coden>JECMA5</coden><abstract>Electron wavefunctions are switched spatially from one quantum well to another by varying the gate voltage
V
g
in spatial wavefunction-switched (SWS) field-effect transistors (FETs), which comprise two or more coupled quantum wells serving as the transport channel. This is shown for Si/SiGe and InGaAs/AlInAs quantum well systems. The presence of charge in a particular well or channel is used to encode four states 00, 01, 10, 11. This unique property is used for two-bit processing, resulting in compact two-bit static random-access memory devices. Experimental data including capacitance–voltage peaks in Si and InGaAs multiple quantum well SWS-FETs has verified the SWS phenomenon. Replacing quantum wells by an array of cladded quantum dots, forming a quantum dot superlattice (QDSL) layer, enhances the contrast and noise margin in SWS-FETs. This paper reports
I
–
V
and
C
–
V
characteristics for a fabricated twin-drain SWS-quantum dot channel (QDC) FET comprising four layers of self-assembled SiO
x
-Si quantum dots. SWS-QDC-FETs are shown to be scalable to ∼9 nm, and comprise four layers of cladded quantum dots with an array of 3 × 3 forming the channel.</abstract><cop>New York</cop><pub>Springer US</pub><doi>10.1007/s11664-015-3827-0</doi><tpages>8</tpages></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0361-5235 |
| ispartof | Journal of electronic materials, 2015-09, Vol.44 (9), p.3108-3115 |
| issn | 0361-5235 1543-186X |
| language | eng |
| recordid | cdi_proquest_journals_1706462089 |
| source | SpringerLink Journals - AutoHoldings |
| subjects | Characterization and Evaluation of Materials Chemistry and Materials Science CMOS Electronics and Microelectronics Instrumentation Materials Science Optical and Electronic Materials Random access memory Solid State Physics Transistors |
| title | Si and InGaAs Spatial Wavefunction-Switched (SWS) FETs with II–VI Gate Insulators: An Approach to the Design and Integration of Two-Bit SRAMs and Binary CMOS Logic |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-06T14%3A51%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Si%20and%20InGaAs%20Spatial%20Wavefunction-Switched%20(SWS)%20FETs%20with%20II%E2%80%93VI%20Gate%20Insulators:%20An%20Approach%20to%20the%20Design%20and%20Integration%20of%20Two-Bit%20SRAMs%20and%20Binary%20CMOS%20Logic&rft.jtitle=Journal%20of%20electronic%20materials&rft.au=Jain,%20F.&rft.date=2015-09-01&rft.volume=44&rft.issue=9&rft.spage=3108&rft.epage=3115&rft.pages=3108-3115&rft.issn=0361-5235&rft.eissn=1543-186X&rft.coden=JECMA5&rft_id=info:doi/10.1007/s11664-015-3827-0&rft_dat=%3Cproquest_cross%3E3786851381%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1706462089&rft_id=info:pmid/&rfr_iscdi=true |