Insight Into Gate-Induced Drain Leakage in Silicon Nanowire Transistors

In this paper, detailed physical mechanisms of gate-induced drain leakage (GIDL) in gate-all-around silicon nanowire transistors (SNWTs) are investigated and verified by experiments and TCAD studies. The results show that the SNWTs will suffer from a more severe GIDL issue in small diameter (D nw )...

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Veröffentlicht in:	IEEE transactions on electron devices 2015-01, Vol.62 (1), p.213-219
Hauptverfasser:	Fan, Jiewen, Li, Ming, Xu, Xiaoyan, Yang, Yuancheng, Xuan, Haoran, Huang, Ru
Format:	Artikel
Sprache:	eng
Schlagworte:	Band-to-band tunneling (BTBT) CMOS technology Doping gate-induced drain leakage (GIDL) Junctions Logic gates Optimization power consumption Shape Silicon silicon nanowire transistors (SNWTs) Tunneling
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