Design of Fast Pipelined Multiplier using Modified Redundant Adder

Carry free arithmetic using higher radix number system such as Redundant Binary Signed Digit can be used to meet the demand for computers operating at much higher speeds. The computation speed can also be increased by using the suitable design of adder and multiplier circuits. Fast RBSD adder cells...

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Veröffentlicht in:	International journal of intelligent systems and applications 2012-04, Vol.4 (4), p.47-53
Hauptverfasser:	Saxena, Rakesh Kumar, Sharma, Neelam, Wadhwani, A. K
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
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