A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization

This paper presents the implementation details and silicon results of a 3 GHz dual-core ARM Cortex TM -A9 (A9) manufactured in the 28 nm planar Ultra-Thin Box and Body Fully-Depleted CMOS (UTBB FD-SOI) technology. The implementation is based on a fully synthesizable standard design flow. The design...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2014-04, Vol.49 (4), p.812-826
Hauptverfasser:	Jacquet, David, Hasbani, Frederic, Flatresse, Philippe, Wilson, Robin, Arnaud, Franck, Cesana, Giorgio, Di Gilio, Thierry, Lecocq, Christophe, Roy, Tanmoy, Chhabra, Amit, Grover, Chiranjeev, Minez, Olivier, Uginet, Jacky, Durieu, Guy, Adobati, Cyril, Casalotto, Davide, Nyer, Frederic, Menut, Patrick, Cathelin, Andreia, Vongsavady, Indavong, Magarshack, Philippe
Format:	Artikel
Sprache:	eng
Schlagworte:	ARM Cortex A9 CMOS integrated circuits CMOS technology dual core processor dynamic voltage and frequency scaling Electrostatics energy efficiency optimization forward body bias Logic gates Silicon Threshold voltage Transistors UTBB FD-SOI
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