A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface

The authors developed a scalable heterogeneous multicore processor. 3D heterogeneous chip stacking of a general-purpose CPU and reconfigurable multicore accelerators enables various trade-offs between performance and energy consumption. The stacked chips interconnect through a scalable 3D network on...

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Veröffentlicht in:	IEEE MICRO 2013-11, Vol.33 (6), p.6-15
Hauptverfasser:	Miura, Noriyuki, Koizumi, Yusuke, Take, Yasuhiro, Matsutani, Hiroki, Kuroda, Tadahiro, Amano, Hideharu, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, Hiroshi
Format:	Artikel
Sprache:	eng
Schlagworte:	Acceleration Central processing units CMOS Communication CPUs heterogeneous multicore system inductive coupling through chip interface Interconnect Multicore processing Network-on-chip Scalability Three dimensional displays
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