A Fast Reactivation Scheme in Power Gating Design
Power gating has become a popular technique to reduce the ever-increasing leakage power for commercial microprocessors or SoCs, however the wakeup energy and delay cost harm its performance. This paper proposes a fast reactivation scheme to reduce the transition delay and energy. The experiment resu...
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Veröffentlicht in: | Applied Mechanics and Materials 2011-10, Vol.135-136, p.1134-1139 |
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Hauptverfasser: | , , , , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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Zusammenfassung: | Power gating has become a popular technique to reduce the ever-increasing leakage power for commercial microprocessors or SoCs, however the wakeup energy and delay cost harm its performance. This paper proposes a fast reactivation scheme to reduce the transition delay and energy. The experiment results show that, comparing to the traditional power gating implementation, it can achieve 19.66% reactivation energy reduction, 9.28% peak leakage reduction, and 23.36% wakeup delay reduction, at the cost of 2.75% area increasing. |
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ISSN: | 1660-9336 1662-7482 1662-7482 |
DOI: | 10.4028/www.scientific.net/AMM.135-136.1134 |