Data Transmission Hardware Design of IPv6 Node for Internet of Things
To reduce the resource consumption in traditional software IPv6 Internet protocols based on embedded system, a data transmission hardware scenario of reduced IPv6 protocol with optimized cache structures based on the FPGA is designed using Verilog HDL. This scenario implements the function of the Tr...
Gespeichert in:
| Veröffentlicht in: | Applied Mechanics and Materials 2013-07, Vol.336-338, p.2494-2499 |
|---|---|
| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 2499 |
|---|---|
| container_issue | |
| container_start_page | 2494 |
| container_title | Applied Mechanics and Materials |
| container_volume | 336-338 |
| creator | Tan, Hong Zhou Chen, Rong Jun Xie, Shun Dao Zhu, Xiong Yong Xie, Kai |
| description | To reduce the resource consumption in traditional software IPv6 Internet protocols based on embedded system, a data transmission hardware scenario of reduced IPv6 protocol with optimized cache structures based on the FPGA is designed using Verilog HDL. This scenario implements the function of the Transport Layer and the Network Layer on FPGA and uses the function of the Data Link Layer and the Physical Layer on the DM9000A chip, which can perform stateless auto-configuration, address resolution, echo response and UDP transmission. To improve the transmission efficiency, a low-resource-consumption and self-managed cache structure is designed to manage the Neighbor Cache, the Prefix Table and the Default Router Table. In the IPv6 network test, the design can configure itself and its data rate exceeds 28Mbps, which can realize real-time video stream, audio stream and other data transmission in Network of Things applications in IPv6 network. |
| doi_str_mv | 10.4028/www.scientific.net/AMM.336-338.2494 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_1442301260</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>3100487391</sourcerecordid><originalsourceid>FETCH-LOGICAL-c371t-6390272c67c2f0df45aa2eae9b08c5bc3bac45699699430bda6bc71e341717ea3</originalsourceid><addsrcrecordid>eNqVkE1PwzAMhiM-JMbYf6jEEbXLV5PmOG2DTWLAYZyjNE23TKwdSUbFvydlSHBFsuWD7fe1HwDuEMwoxMW467rMa2uaYGurs8aE8WS1yghhKSFFhqmgZ2CAGMMppwU-ByPBCwIJL3KeI3Hx3YOpiAtX4Nr7HYSMIloMwHymgkrWTjV-b723bZMslKs65UwyM95umqStk-XLB0ue2sokdeuSZROMizf0nfXWNht_Ay5r9ebN6KcOwev9fD1dpI_PD8vp5DHVhKOQMiIg5lgzrnENq5rmSmGjjChhofNSk1JpmjMhYlACy0qxUnNkCEUccaPIENyedA-ufT8aH-SuPbomWkpEKSYQYQbj1PQ0pV3rvTO1PDi7V-5TIih7njLylL88ZfxFRp4y4olZyJ5nVJmfVEIPJxi9_WP2D50v-giFWA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1442301260</pqid></control><display><type>article</type><title>Data Transmission Hardware Design of IPv6 Node for Internet of Things</title><source>Scientific.net Journals</source><creator>Tan, Hong Zhou ; Chen, Rong Jun ; Xie, Shun Dao ; Zhu, Xiong Yong ; Xie, Kai</creator><creatorcontrib>Tan, Hong Zhou ; Chen, Rong Jun ; Xie, Shun Dao ; Zhu, Xiong Yong ; Xie, Kai</creatorcontrib><description>To reduce the resource consumption in traditional software IPv6 Internet protocols based on embedded system, a data transmission hardware scenario of reduced IPv6 protocol with optimized cache structures based on the FPGA is designed using Verilog HDL. This scenario implements the function of the Transport Layer and the Network Layer on FPGA and uses the function of the Data Link Layer and the Physical Layer on the DM9000A chip, which can perform stateless auto-configuration, address resolution, echo response and UDP transmission. To improve the transmission efficiency, a low-resource-consumption and self-managed cache structure is designed to manage the Neighbor Cache, the Prefix Table and the Default Router Table. In the IPv6 network test, the design can configure itself and its data rate exceeds 28Mbps, which can realize real-time video stream, audio stream and other data transmission in Network of Things applications in IPv6 network.</description><identifier>ISSN: 1660-9336</identifier><identifier>ISSN: 1662-7482</identifier><identifier>ISBN: 9783037857519</identifier><identifier>ISBN: 303785751X</identifier><identifier>EISSN: 1662-7482</identifier><identifier>DOI: 10.4028/www.scientific.net/AMM.336-338.2494</identifier><language>eng</language><publisher>Zurich: Trans Tech Publications Ltd</publisher><subject>Internet of Things</subject><ispartof>Applied Mechanics and Materials, 2013-07, Vol.336-338, p.2494-2499</ispartof><rights>2013 Trans Tech Publications Ltd</rights><rights>Copyright Trans Tech Publications Ltd. Jul 2013</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c371t-6390272c67c2f0df45aa2eae9b08c5bc3bac45699699430bda6bc71e341717ea3</citedby><cites>FETCH-LOGICAL-c371t-6390272c67c2f0df45aa2eae9b08c5bc3bac45699699430bda6bc71e341717ea3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Uhttps://www.scientific.net/Image/TitleCover/2491?width=600</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Tan, Hong Zhou</creatorcontrib><creatorcontrib>Chen, Rong Jun</creatorcontrib><creatorcontrib>Xie, Shun Dao</creatorcontrib><creatorcontrib>Zhu, Xiong Yong</creatorcontrib><creatorcontrib>Xie, Kai</creatorcontrib><title>Data Transmission Hardware Design of IPv6 Node for Internet of Things</title><title>Applied Mechanics and Materials</title><description>To reduce the resource consumption in traditional software IPv6 Internet protocols based on embedded system, a data transmission hardware scenario of reduced IPv6 protocol with optimized cache structures based on the FPGA is designed using Verilog HDL. This scenario implements the function of the Transport Layer and the Network Layer on FPGA and uses the function of the Data Link Layer and the Physical Layer on the DM9000A chip, which can perform stateless auto-configuration, address resolution, echo response and UDP transmission. To improve the transmission efficiency, a low-resource-consumption and self-managed cache structure is designed to manage the Neighbor Cache, the Prefix Table and the Default Router Table. In the IPv6 network test, the design can configure itself and its data rate exceeds 28Mbps, which can realize real-time video stream, audio stream and other data transmission in Network of Things applications in IPv6 network.</description><subject>Internet of Things</subject><issn>1660-9336</issn><issn>1662-7482</issn><issn>1662-7482</issn><isbn>9783037857519</isbn><isbn>303785751X</isbn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>ABUWG</sourceid><sourceid>AFKRA</sourceid><sourceid>BENPR</sourceid><sourceid>CCPQU</sourceid><sourceid>DWQXO</sourceid><recordid>eNqVkE1PwzAMhiM-JMbYf6jEEbXLV5PmOG2DTWLAYZyjNE23TKwdSUbFvydlSHBFsuWD7fe1HwDuEMwoxMW467rMa2uaYGurs8aE8WS1yghhKSFFhqmgZ2CAGMMppwU-ByPBCwIJL3KeI3Hx3YOpiAtX4Nr7HYSMIloMwHymgkrWTjV-b723bZMslKs65UwyM95umqStk-XLB0ue2sokdeuSZROMizf0nfXWNht_Ay5r9ebN6KcOwev9fD1dpI_PD8vp5DHVhKOQMiIg5lgzrnENq5rmSmGjjChhofNSk1JpmjMhYlACy0qxUnNkCEUccaPIENyedA-ufT8aH-SuPbomWkpEKSYQYQbj1PQ0pV3rvTO1PDi7V-5TIih7njLylL88ZfxFRp4y4olZyJ5nVJmfVEIPJxi9_WP2D50v-giFWA</recordid><startdate>20130701</startdate><enddate>20130701</enddate><creator>Tan, Hong Zhou</creator><creator>Chen, Rong Jun</creator><creator>Xie, Shun Dao</creator><creator>Zhu, Xiong Yong</creator><creator>Xie, Kai</creator><general>Trans Tech Publications Ltd</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SR</scope><scope>7TB</scope><scope>8BQ</scope><scope>8FD</scope><scope>8FE</scope><scope>8FG</scope><scope>ABJCF</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>BENPR</scope><scope>BFMQW</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>D1I</scope><scope>DWQXO</scope><scope>FR3</scope><scope>HCIFZ</scope><scope>JG9</scope><scope>KB.</scope><scope>KR7</scope><scope>L6V</scope><scope>M7S</scope><scope>PDBOC</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PRINS</scope><scope>PTHSS</scope></search><sort><creationdate>20130701</creationdate><title>Data Transmission Hardware Design of IPv6 Node for Internet of Things</title><author>Tan, Hong Zhou ; Chen, Rong Jun ; Xie, Shun Dao ; Zhu, Xiong Yong ; Xie, Kai</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c371t-6390272c67c2f0df45aa2eae9b08c5bc3bac45699699430bda6bc71e341717ea3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Internet of Things</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tan, Hong Zhou</creatorcontrib><creatorcontrib>Chen, Rong Jun</creatorcontrib><creatorcontrib>Xie, Shun Dao</creatorcontrib><creatorcontrib>Zhu, Xiong Yong</creatorcontrib><creatorcontrib>Xie, Kai</creatorcontrib><collection>CrossRef</collection><collection>Engineered Materials Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>METADEX</collection><collection>Technology Research Database</collection><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>Materials Science & Engineering Collection</collection><collection>ProQuest Central (Alumni Edition)</collection><collection>ProQuest Central UK/Ireland</collection><collection>ProQuest Central</collection><collection>Continental Europe Database</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Materials Science Collection</collection><collection>ProQuest Central Korea</collection><collection>Engineering Research Database</collection><collection>SciTech Premium Collection</collection><collection>Materials Research Database</collection><collection>Materials Science Database</collection><collection>Civil Engineering Abstracts</collection><collection>ProQuest Engineering Collection</collection><collection>Engineering Database</collection><collection>Materials Science Collection</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><collection>ProQuest Central China</collection><collection>Engineering Collection</collection><jtitle>Applied Mechanics and Materials</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Tan, Hong Zhou</au><au>Chen, Rong Jun</au><au>Xie, Shun Dao</au><au>Zhu, Xiong Yong</au><au>Xie, Kai</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Data Transmission Hardware Design of IPv6 Node for Internet of Things</atitle><jtitle>Applied Mechanics and Materials</jtitle><date>2013-07-01</date><risdate>2013</risdate><volume>336-338</volume><spage>2494</spage><epage>2499</epage><pages>2494-2499</pages><issn>1660-9336</issn><issn>1662-7482</issn><eissn>1662-7482</eissn><isbn>9783037857519</isbn><isbn>303785751X</isbn><abstract>To reduce the resource consumption in traditional software IPv6 Internet protocols based on embedded system, a data transmission hardware scenario of reduced IPv6 protocol with optimized cache structures based on the FPGA is designed using Verilog HDL. This scenario implements the function of the Transport Layer and the Network Layer on FPGA and uses the function of the Data Link Layer and the Physical Layer on the DM9000A chip, which can perform stateless auto-configuration, address resolution, echo response and UDP transmission. To improve the transmission efficiency, a low-resource-consumption and self-managed cache structure is designed to manage the Neighbor Cache, the Prefix Table and the Default Router Table. In the IPv6 network test, the design can configure itself and its data rate exceeds 28Mbps, which can realize real-time video stream, audio stream and other data transmission in Network of Things applications in IPv6 network.</abstract><cop>Zurich</cop><pub>Trans Tech Publications Ltd</pub><doi>10.4028/www.scientific.net/AMM.336-338.2494</doi><tpages>6</tpages></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 1660-9336 |
| ispartof | Applied Mechanics and Materials, 2013-07, Vol.336-338, p.2494-2499 |
| issn | 1660-9336 1662-7482 1662-7482 |
| language | eng |
| recordid | cdi_proquest_journals_1442301260 |
| source | Scientific.net Journals |
| subjects | Internet of Things |
| title | Data Transmission Hardware Design of IPv6 Node for Internet of Things |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T12%3A35%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Data%20Transmission%20Hardware%20Design%20of%20IPv6%20Node%20for%20Internet%20of%20Things&rft.jtitle=Applied%20Mechanics%20and%20Materials&rft.au=Tan,%20Hong%20Zhou&rft.date=2013-07-01&rft.volume=336-338&rft.spage=2494&rft.epage=2499&rft.pages=2494-2499&rft.issn=1660-9336&rft.eissn=1662-7482&rft.isbn=9783037857519&rft.isbn_list=303785751X&rft_id=info:doi/10.4028/www.scientific.net/AMM.336-338.2494&rft_dat=%3Cproquest_cross%3E3100487391%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1442301260&rft_id=info:pmid/&rfr_iscdi=true |