A Program Disturb Model and Channel Leakage Current Study for Sub-20 nm nand Flash Cells
We have developed a program-disturb model to characterize the channel potential of the program-inhibited string during NAND flash cell programming. This model includes cell-to-cell capacitances from 3-D technology computer-aided design simulation and leakage currents associated with the boosted chan...
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Veröffentlicht in: | IEEE transactions on electron devices 2011-01, Vol.58 (1), p.11-16 |
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creator | Torsi, A Yijie Zhao Haitao Liu Tanzawa, T Goda, A Kalavade, P Parat, K |
description | We have developed a program-disturb model to characterize the channel potential of the program-inhibited string during NAND flash cell programming. This model includes cell-to-cell capacitances from 3-D technology computer-aided design simulation and leakage currents associated with the boosted channel. We studied the program-disturb characteristics of sub-30-nm NAND cells using a delayed programming pulse method. The simulation results agree with the experimental data very well and show quantitative impacts of junction leakage current, band-to-band tunneling (BTBT) current, Fowler-Nordheim tunneling current, and channel capacitance on the program disturb. We further discuss the cell-scaling trend and identify that the BTBT current can be a dominant mechanism for the program disturb of sub-20-nm NAND cells. |
doi_str_mv | 10.1109/TED.2010.2087338 |
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This model includes cell-to-cell capacitances from 3-D technology computer-aided design simulation and leakage currents associated with the boosted channel. We studied the program-disturb characteristics of sub-30-nm NAND cells using a delayed programming pulse method. The simulation results agree with the experimental data very well and show quantitative impacts of junction leakage current, band-to-band tunneling (BTBT) current, Fowler-Nordheim tunneling current, and channel capacitance on the program disturb. We further discuss the cell-scaling trend and identify that the BTBT current can be a dominant mechanism for the program disturb of sub-20-nm NAND cells.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2010.2087338</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Band-to-band tunneling (BTBT) ; Boosting ; Boron ; Capacitance ; channel boosting ratio (CBR) ; channel coupling ratio (CCR) ; Channels ; Computer aided design ; Computer simulation ; Couplings ; Design. Technologies. Operation analysis. Testing ; Devices ; Electric potential ; Electronics ; Exact sciences and technology ; flash memory ; Fowler-Nordheim (FN) tunneling ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; junction leakage (J/L) ; Leakage current ; nand cell ; program disturb ; program-disturb ratio (PDR) ; Programming ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Strings ; Tunneling</subject><ispartof>IEEE transactions on electron devices, 2011-01, Vol.58 (1), p.11-16</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Jan 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c353t-2e44868571ea1c77226ef7dad3c311ed906bf9a2c4df475f5570c122f8cb54ce3</citedby><cites>FETCH-LOGICAL-c353t-2e44868571ea1c77226ef7dad3c311ed906bf9a2c4df475f5570c122f8cb54ce3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5618557$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,4024,27923,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5618557$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=23746820$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Torsi, A</creatorcontrib><creatorcontrib>Yijie Zhao</creatorcontrib><creatorcontrib>Haitao Liu</creatorcontrib><creatorcontrib>Tanzawa, T</creatorcontrib><creatorcontrib>Goda, A</creatorcontrib><creatorcontrib>Kalavade, P</creatorcontrib><creatorcontrib>Parat, K</creatorcontrib><title>A Program Disturb Model and Channel Leakage Current Study for Sub-20 nm nand Flash Cells</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>We have developed a program-disturb model to characterize the channel potential of the program-inhibited string during NAND flash cell programming. This model includes cell-to-cell capacitances from 3-D technology computer-aided design simulation and leakage currents associated with the boosted channel. We studied the program-disturb characteristics of sub-30-nm NAND cells using a delayed programming pulse method. The simulation results agree with the experimental data very well and show quantitative impacts of junction leakage current, band-to-band tunneling (BTBT) current, Fowler-Nordheim tunneling current, and channel capacitance on the program disturb. We further discuss the cell-scaling trend and identify that the BTBT current can be a dominant mechanism for the program disturb of sub-20-nm NAND cells.</description><subject>Applied sciences</subject><subject>Band-to-band tunneling (BTBT)</subject><subject>Boosting</subject><subject>Boron</subject><subject>Capacitance</subject><subject>channel boosting ratio (CBR)</subject><subject>channel coupling ratio (CCR)</subject><subject>Channels</subject><subject>Computer aided design</subject><subject>Computer simulation</subject><subject>Couplings</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Electric potential</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>flash memory</subject><subject>Fowler-Nordheim (FN) tunneling</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>junction leakage (J/L)</subject><subject>Leakage current</subject><subject>nand cell</subject><subject>program disturb</subject><subject>program-disturb ratio (PDR)</subject><subject>Programming</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Strings</subject><subject>Tunneling</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkM1LxDAQxYMouH7cBS8BEU_VfDVJj0vXVWFFwRW8lTSdaLWbrkl78L83yy4ePM0M83vDvIfQGSXXlJLiZnk7u2YkTYxoxbneQxOa5yorpJD7aEII1VnBNT9ERzF-plEKwSbobYqfQ_8ezArP2jiMocaPfQMdNr7B5YfxPvULMF_mHXA5hgB-wC_D2Pxg1wf8MtYZI9ivsN8I5p2JH7iErosn6MCZLsLprh6j1_ntsrzPFk93D-V0kVme8yFjIISWOlcUDLVKMSbBqcY03HJKoSmIrF1hmBWNEyp3yRKxlDGnbZ0LC_wYXW3vrkP_PUIcqlUbbfrAeOjHWGlJc0GT10Re_CM_-zH49FxFCSe00ILLRJEtZUMfYwBXrUO7MuEnQdUm6SolXW2SrnZJJ8nl7rCJ1nQuGG_b-KdjXAmpGUnc-ZZrAeBvnUuqkyv-C71dg_A</recordid><startdate>201101</startdate><enddate>201101</enddate><creator>Torsi, A</creator><creator>Yijie Zhao</creator><creator>Haitao Liu</creator><creator>Tanzawa, T</creator><creator>Goda, A</creator><creator>Kalavade, P</creator><creator>Parat, K</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>201101</creationdate><title>A Program Disturb Model and Channel Leakage Current Study for Sub-20 nm nand Flash Cells</title><author>Torsi, A ; Yijie Zhao ; Haitao Liu ; Tanzawa, T ; Goda, A ; Kalavade, P ; Parat, K</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c353t-2e44868571ea1c77226ef7dad3c311ed906bf9a2c4df475f5570c122f8cb54ce3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Applied sciences</topic><topic>Band-to-band tunneling (BTBT)</topic><topic>Boosting</topic><topic>Boron</topic><topic>Capacitance</topic><topic>channel boosting ratio (CBR)</topic><topic>channel coupling ratio (CCR)</topic><topic>Channels</topic><topic>Computer aided design</topic><topic>Computer simulation</topic><topic>Couplings</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Electric potential</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>flash memory</topic><topic>Fowler-Nordheim (FN) tunneling</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>junction leakage (J/L)</topic><topic>Leakage current</topic><topic>nand cell</topic><topic>program disturb</topic><topic>program-disturb ratio (PDR)</topic><topic>Programming</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Strings</topic><topic>Tunneling</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Torsi, A</creatorcontrib><creatorcontrib>Yijie Zhao</creatorcontrib><creatorcontrib>Haitao Liu</creatorcontrib><creatorcontrib>Tanzawa, T</creatorcontrib><creatorcontrib>Goda, A</creatorcontrib><creatorcontrib>Kalavade, P</creatorcontrib><creatorcontrib>Parat, K</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Torsi, A</au><au>Yijie Zhao</au><au>Haitao Liu</au><au>Tanzawa, T</au><au>Goda, A</au><au>Kalavade, P</au><au>Parat, K</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Program Disturb Model and Channel Leakage Current Study for Sub-20 nm nand Flash Cells</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2011-01</date><risdate>2011</risdate><volume>58</volume><issue>1</issue><spage>11</spage><epage>16</epage><pages>11-16</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>We have developed a program-disturb model to characterize the channel potential of the program-inhibited string during NAND flash cell programming. This model includes cell-to-cell capacitances from 3-D technology computer-aided design simulation and leakage currents associated with the boosted channel. We studied the program-disturb characteristics of sub-30-nm NAND cells using a delayed programming pulse method. The simulation results agree with the experimental data very well and show quantitative impacts of junction leakage current, band-to-band tunneling (BTBT) current, Fowler-Nordheim tunneling current, and channel capacitance on the program disturb. We further discuss the cell-scaling trend and identify that the BTBT current can be a dominant mechanism for the program disturb of sub-20-nm NAND cells.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2010.2087338</doi><tpages>6</tpages></addata></record> |
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subjects | Applied sciences Band-to-band tunneling (BTBT) Boosting Boron Capacitance channel boosting ratio (CBR) channel coupling ratio (CCR) Channels Computer aided design Computer simulation Couplings Design. Technologies. Operation analysis. Testing Devices Electric potential Electronics Exact sciences and technology flash memory Fowler-Nordheim (FN) tunneling Integrated circuits Integrated circuits by function (including memories and processors) junction leakage (J/L) Leakage current nand cell program disturb program-disturb ratio (PDR) Programming Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Strings Tunneling |
title | A Program Disturb Model and Channel Leakage Current Study for Sub-20 nm nand Flash Cells |
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