Design of the trigger system for the AUGER fluorescence detector
The trigger system for the AUGER fluorescence detector is presented. The main goals of the design were low price, high flexibility of the trigger, high reliability and good testability even at remote operation. The simulation of all boards using VHDL tools resulted in a design which is optimal with...
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Veröffentlicht in: | IEEE transactions on nuclear science 2000-04, Vol.47 (2), p.371-375 |
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container_title | IEEE transactions on nuclear science |
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creator | Gemmeke, H. Grindler, A. Keim, H. Kleifges, M. Kunka, N. Szadkowski, Z. Tcherniakhovski, D. |
description | The trigger system for the AUGER fluorescence detector is presented. The main goals of the design were low price, high flexibility of the trigger, high reliability and good testability even at remote operation. The simulation of all boards using VHDL tools resulted in a design which is optimal with respect to these goals and highly independent of existing commercial solutions. The large-scale integration of modern FPGAs yielded a massive parallel system for recognition of tracks and suppression of background. The readout and control is carried out by low cost PCs under the LINUX operating system. |
doi_str_mv | 10.1109/23.846184 |
format | Article |
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The readout and control is carried out by low cost PCs under the LINUX operating system.</description><subject>Augers</subject><subject>Boards</subject><subject>Control systems</subject><subject>Costs</subject><subject>Design engineering</subject><subject>Detectors</subject><subject>Field programmable gate arrays</subject><subject>Flexibility</subject><subject>Fluorescence</subject><subject>Large scale integration</subject><subject>Linux</subject><subject>Operating systems</subject><subject>Optimization</subject><subject>Personal communication networks</subject><subject>Testability</subject><subject>Testing</subject><issn>0018-9499</issn><issn>1558-1578</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2000</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqF0UFLwzAUAOAgCs7pwaungiB66EyapE1ujjmnMBDEnUubvsyOrplJeti_N7XDgwd9l_De-8hLeAhdEjwhBMv7hE4ES4lgR2hEOBcx4Zk4RiOMiYglk_IUnTm3CSnjmI_QwyO4et1GRkf-AyJv6_UabOT2zsM20sZ-l6erxfwt0k1nLDgFrYKoAg_KG3uOTnTROLg4nGO0epq_z57j5eviZTZdxoqm0sdaguSiKlIMJROghCwJL4hWsuKYVglmBZQcOMswVSURiobgvSI6I2VGx-hmuHdnzWcHzufbOjylaYoWTOfyRCQ8EZn4H2ZMYpH28PZPSDAllLBU9MOvf9GN6Wwb_hsUThgVXNKg7galrHHOgs53tt4Wdh9Q3m8nT2g-bCfYq8HWAPDjDs0vi9uHHQ</recordid><startdate>20000401</startdate><enddate>20000401</enddate><creator>Gemmeke, H.</creator><creator>Grindler, A.</creator><creator>Keim, H.</creator><creator>Kleifges, M.</creator><creator>Kunka, N.</creator><creator>Szadkowski, Z.</creator><creator>Tcherniakhovski, D.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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subjects | Augers Boards Control systems Costs Design engineering Detectors Field programmable gate arrays Flexibility Fluorescence Large scale integration Linux Operating systems Optimization Personal communication networks Testability Testing |
title | Design of the trigger system for the AUGER fluorescence detector |
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