Degradations due to hole trapping in flash memory cells

Degradation in the hot-electron programmability of the flash memory cell is observed after erasing from the drain. Trapped holes in the oxide near the drain junction are found to be responsible for this degradation. Hole trapping in the oxide also causes another problem known as gate disturb, which...

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Veröffentlicht in:IEEE electron device letters 1989-03, Vol.10 (3), p.117-119
Hauptverfasser: Haddad, S., Chang, C., Swaminathan, B., Lien, J.
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Chang, C.
Swaminathan, B.
Lien, J.
description Degradation in the hot-electron programmability of the flash memory cell is observed after erasing from the drain. Trapped holes in the oxide near the drain junction are found to be responsible for this degradation. Hole trapping in the oxide also causes another problem known as gate disturb, which is the undesired increase in the threshold voltage of an erased cell during programming of the other cells on the same word line. Threshold-voltage shifts due to gate disturb are used to monitor the amount of trapped holes in the oxide after cell erasure. It is determined that the trapped holes are mainly externally injected from the junction depletion region rather than directly generated in the oxide by the Fowler-Nordheim (F-N) tunneling process.< >
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Trapped holes in the oxide near the drain junction are found to be responsible for this degradation. Hole trapping in the oxide also causes another problem known as gate disturb, which is the undesired increase in the threshold voltage of an erased cell during programming of the other cells on the same word line. Threshold-voltage shifts due to gate disturb are used to monitor the amount of trapped holes in the oxide after cell erasure. It is determined that the trapped holes are mainly externally injected from the junction depletion region rather than directly generated in the oxide by the Fowler-Nordheim (F-N) tunneling process.&lt; &gt;</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/55.31687</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Degradation ; Electron traps ; Electronics ; EPROM ; Exact sciences and technology ; Flash memory cells ; Hot carriers ; Magnetic and optical mass memories ; Monitoring ; Nonvolatile memory ; Secondary generated hot electron injection ; Storage and reproduction of information ; Threshold voltage ; Tunneling</subject><ispartof>IEEE electron device letters, 1989-03, Vol.10 (3), p.117-119</ispartof><rights>1989 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c303t-bfda6e3532edfb29fcc5f8d8007b90da92447bd95bd0a3e0402efbb83cffcd8f3</citedby><cites>FETCH-LOGICAL-c303t-bfda6e3532edfb29fcc5f8d8007b90da92447bd95bd0a3e0402efbb83cffcd8f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/31687$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27906,27907,54740</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/31687$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&amp;idt=7248422$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Haddad, S.</creatorcontrib><creatorcontrib>Chang, C.</creatorcontrib><creatorcontrib>Swaminathan, B.</creatorcontrib><creatorcontrib>Lien, J.</creatorcontrib><title>Degradations due to hole trapping in flash memory cells</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>Degradation in the hot-electron programmability of the flash memory cell is observed after erasing from the drain. Trapped holes in the oxide near the drain junction are found to be responsible for this degradation. Hole trapping in the oxide also causes another problem known as gate disturb, which is the undesired increase in the threshold voltage of an erased cell during programming of the other cells on the same word line. Threshold-voltage shifts due to gate disturb are used to monitor the amount of trapped holes in the oxide after cell erasure. It is determined that the trapped holes are mainly externally injected from the junction depletion region rather than directly generated in the oxide by the Fowler-Nordheim (F-N) tunneling process.&lt; &gt;</description><subject>Applied sciences</subject><subject>Degradation</subject><subject>Electron traps</subject><subject>Electronics</subject><subject>EPROM</subject><subject>Exact sciences and technology</subject><subject>Flash memory cells</subject><subject>Hot carriers</subject><subject>Magnetic and optical mass memories</subject><subject>Monitoring</subject><subject>Nonvolatile memory</subject><subject>Secondary generated hot electron injection</subject><subject>Storage and reproduction of information</subject><subject>Threshold voltage</subject><subject>Tunneling</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1989</creationdate><recordtype>article</recordtype><recordid>eNo9kEtLw0AUhQdRsFbBrbssRNyk3nklk6W0vqDgRtdhHnfaSF7OpIv-e1NTujqL8_FxOITcUlhQCsWTlAtOM5WfkRmVUqUgM35OZpALmnIK2SW5ivEHgAqRixnJV7gJ2umh6tqYuB0mQ5dsu3rMoPu-ajdJ1Sa-1nGbNNh0YZ9YrOt4TS68riPeHHNOvl9fvpbv6frz7WP5vE4tBz6kxjudIZecofOGFd5a6ZVTALkpwOmCjTOMK6RxoDmCAIbeGMWt99Ypz-fkYfL2ofvdYRzKpoqHBbrFbhdLpphQOctG8HECbehiDOjLPlSNDvuSQnl4ppSy_H9mRO-PTh2trn3Qra3iic9Ho2BsxO4mrELEUzsp_gANF2rj</recordid><startdate>19890301</startdate><enddate>19890301</enddate><creator>Haddad, S.</creator><creator>Chang, C.</creator><creator>Swaminathan, B.</creator><creator>Lien, J.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19890301</creationdate><title>Degradations due to hole trapping in flash memory cells</title><author>Haddad, S. ; Chang, C. ; Swaminathan, B. ; Lien, J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c303t-bfda6e3532edfb29fcc5f8d8007b90da92447bd95bd0a3e0402efbb83cffcd8f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1989</creationdate><topic>Applied sciences</topic><topic>Degradation</topic><topic>Electron traps</topic><topic>Electronics</topic><topic>EPROM</topic><topic>Exact sciences and technology</topic><topic>Flash memory cells</topic><topic>Hot carriers</topic><topic>Magnetic and optical mass memories</topic><topic>Monitoring</topic><topic>Nonvolatile memory</topic><topic>Secondary generated hot electron injection</topic><topic>Storage and reproduction of information</topic><topic>Threshold voltage</topic><topic>Tunneling</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Haddad, S.</creatorcontrib><creatorcontrib>Chang, C.</creatorcontrib><creatorcontrib>Swaminathan, B.</creatorcontrib><creatorcontrib>Lien, J.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Haddad, S.</au><au>Chang, C.</au><au>Swaminathan, B.</au><au>Lien, J.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Degradations due to hole trapping in flash memory cells</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>1989-03-01</date><risdate>1989</risdate><volume>10</volume><issue>3</issue><spage>117</spage><epage>119</epage><pages>117-119</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>Degradation in the hot-electron programmability of the flash memory cell is observed after erasing from the drain. Trapped holes in the oxide near the drain junction are found to be responsible for this degradation. Hole trapping in the oxide also causes another problem known as gate disturb, which is the undesired increase in the threshold voltage of an erased cell during programming of the other cells on the same word line. Threshold-voltage shifts due to gate disturb are used to monitor the amount of trapped holes in the oxide after cell erasure. It is determined that the trapped holes are mainly externally injected from the junction depletion region rather than directly generated in the oxide by the Fowler-Nordheim (F-N) tunneling process.&lt; &gt;</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/55.31687</doi><tpages>3</tpages></addata></record>
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subjects Applied sciences
Degradation
Electron traps
Electronics
EPROM
Exact sciences and technology
Flash memory cells
Hot carriers
Magnetic and optical mass memories
Monitoring
Nonvolatile memory
Secondary generated hot electron injection
Storage and reproduction of information
Threshold voltage
Tunneling
title Degradations due to hole trapping in flash memory cells
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